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公开(公告)号:US11769789B2
公开(公告)日:2023-09-26
申请号:US16368450
申请日:2019-03-28
申请人: Intel Corporation
发明人: Nazila Haratipour , Chia-Ching Lin , Sou-Chi Chang , Ashish Verma Penumatcha , Owen Loh , Mengcheng Lu , Seung Hoon Sung , Ian A. Young , Uygar Avci , Jack T. Kavalieros
IPC分类号: H01G4/30 , H10B51/00 , H01L23/522 , H01L49/02 , H01G4/012
CPC分类号: H01L28/56 , H01G4/012 , H01G4/30 , H01L23/5226 , H10B51/00
摘要: A capacitor is disclosed. The capacitor includes a first metal layer, a second metal layer on the first metal layer, a ferroelectric layer on the second metal layer, and a third metal layer on the ferroelectric layer. The second metal layer includes a first non-reactive barrier metal and the third metal layer includes a second non-reactive barrier metal. A fourth metal layer is on the third metal layer.
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公开(公告)号:US20230253444A1
公开(公告)日:2023-08-10
申请号:US17666745
申请日:2022-02-08
申请人: Intel Corporation
发明人: Arnab Sen Gupta , Kaan Oguz , Chia-Ching Lin , I-Cheng Tung , Sudarat Lee , Sou-Chi Chang , Matthew V. Metz , Scott B. Clendenning , Uygar E. Avci , Ian A. Young , Jason C. Retasket , Edward O. Johnson, JR.
IPC分类号: H01L49/02 , H01L27/108
CPC分类号: H01L28/65 , H01L28/75 , H01L27/10829
摘要: Described herein are capacitor devices formed using perovskite insulators. In one example, a perovskite templating material is formed over an electrode, and a perovskite insulator layer is grown over the templating material. The templating material improves the crystal structure and electrical properties in the perovskite insulator layer. One or both electrodes may be ruthenium. In another example, a perovskite insulator layer is formed between two layers of indium tin oxide (ITO), with the ITO layers forming the capacitor electrodes.
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公开(公告)号:US11626475B2
公开(公告)日:2023-04-11
申请号:US16441905
申请日:2019-06-14
申请人: INTEL CORPORATION
发明人: Nazila Haratipour , Chia-Ching Lin , Sou-Chi Chang , Ian A. Young , Uygar E. Avci , Jack T. Kavalieros
摘要: An improved trench capacitor structure is disclosed that allows for the formation of narrower capacitors. An example capacitor structure includes a first conductive layer on the sidewalls of an opening through a thickness of a dielectric layer, a capacitor dielectric layer on the first conductive layer, a second conductive layer on the capacitor dielectric layer, and a conductive fill material on the second conductive layer. The capacitor dielectric layer laterally extends above the opening and along a top surface of the dielectric layer, and the conductive fill material fills a remaining portion of the opening.
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公开(公告)号:US11581417B2
公开(公告)日:2023-02-14
申请号:US16130903
申请日:2018-09-13
申请人: Intel Corporation
发明人: Sasikanth Manipatruni , Uygar Avci , Sou-Chi Chang , Ian Young
IPC分类号: G11C11/22 , H01L29/51 , H01L29/78 , H01L27/11585 , H01L27/11502
摘要: A capacitor is provided which comprises: a first structure comprising metal; a second structure comprising metal; and a third structure between the first and second structures, wherein the third structure comprises an improper ferroelectric material. In some embodiments, a field effect transistor (FET) is provided which comprises: a substrate; a source and drain adjacent to the substrate; and a gate stack between the source and drain, wherein the gate stack includes: a dielectric; a first structure comprising improper ferroelectric material, wherein the first structure is adjacent to the dielectric; and a second structure comprising metal, wherein the second structure is adjacent to the first structure.
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公开(公告)号:US20210408018A1
公开(公告)日:2021-12-30
申请号:US16914140
申请日:2020-06-26
申请人: Intel Corporation
发明人: Nazila Haratipour , Sou-Chi Chang , Shriram Shivaraman , I-Cheng Tung , Tobias Brown-Heft , Devin R. Merrill , Che-Yun Lin , Seung Hoon Sung , Jack Kavalieros , Uygar Avci , Matthew V. Metz
IPC分类号: H01L27/11502 , H01L49/02 , H01L27/08 , H01G4/008 , G11C11/22
摘要: An integrated circuit capacitor structure, includes a first electrode includes a cylindrical column, a ferroelectric layer around an exterior sidewall of the cylindrical column and a plurality of outer electrodes. The plurality of outer electrodes include a first outer electrode laterally adjacent to a first portion of an exterior of the ferroelectric layer and a second outer electrode laterally adjacent to a second portion of the exterior of the ferroelectric layer, wherein the second outer electrode is above the first outer electrode.
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公开(公告)号:US20200286686A1
公开(公告)日:2020-09-10
申请号:US16296082
申请日:2019-03-07
申请人: Intel Corporation
发明人: Chia-Ching Lin , Sou-Chi Chang , Ashish Verma Penumatcha , Nazila Haratipour , Seung Hoon Sung , Owen Y. Loh , Jack Kavalieros , Uygar E. Avci , Ian A. Young
IPC分类号: H01G7/06 , H01L49/02 , H01L27/108
摘要: Described is a ferroelectric-based capacitor that improves reliability of a ferroelectric memory by using low-leakage insulating thin film. In one example, the low-leakage insulating thin film is positioned between a bottom electrode and a ferroelectric oxide. In another example, the low-leakage insulating thin film is positioned between a top electrode and ferroelectric oxide. In yet another example, the low-leakage insulating thin film is positioned in the middle of ferroelectric oxide to reduce the leakage current and improve reliability of the ferroelectric oxide.
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公开(公告)号:US12040378B2
公开(公告)日:2024-07-16
申请号:US17336149
申请日:2021-06-01
申请人: Intel Corporation
发明人: Nazila Haratipour , Sou-Chi Chang , Chia-Ching Lin , Jack Kavalieros , Uygar Avci , Ian Young
IPC分类号: H01L29/51 , H01L29/15 , H01L29/221 , H01L29/94
CPC分类号: H01L29/516 , H01L29/151 , H01L29/221 , H01L29/945
摘要: Described is a ferroelectric-based capacitor that improves reliability of a ferroelectric memory by providing tensile stress along a plane (e.g., x-axis) of a ferroelectric or anti-ferroelectric material of the ferroelectric/anti-ferroelectric based capacitor. Tensile stress is provided by a spacer comprising metal, semimetal, or oxide (e.g., metal or oxide of one or more of: Al, Ti, Hf, Si, Ir, or N). The tensile stress provides polar orthorhombic phase to the ferroelectric material and tetragonal phase to the anti-ferroelectric material. As such, memory window and reliability of the ferroelectric/anti-ferroelectric oxide thin film improves.
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公开(公告)号:US11980037B2
公开(公告)日:2024-05-07
申请号:US16906217
申请日:2020-06-19
申请人: Intel Corporation
发明人: Nazila Haratipour , Shriram Shivaraman , Sou-Chi Chang , Jack T. Kavalieros , Uygar E. Avci , Chia-Ching Lin , Seung Hoon Sung , Ashish Verma Penumatcha , Ian A. Young , Devin R. Merrill , Matthew V. Metz , I-Cheng Tung
IPC分类号: H10B53/30 , H01L21/768 , H01L23/522
CPC分类号: H10B53/30 , H01L21/7687 , H01L23/5226 , H01L21/76843
摘要: Described herein are ferroelectric (FE) memory cells that include transistors having gate stacks separate from FE capacitors of these cells. An example memory cell may be implemented as an IC device that includes a support structure (e.g., a substrate) and a transistor provided over the support structure and including a gate stack. The IC device also includes a FE capacitor having a first capacitor electrode, a second capacitor electrode, and a capacitor insulator of a FE material between the first capacitor electrode and the second capacitor electrode, where the FE capacitor is separate from the gate stack (i.e., is not integrated within the gate stack and does not have any layers that are part of the gate stack). The IC device further includes an interconnect structure, configured to electrically couple the gate stack and the first capacitor electrode.
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公开(公告)号:US20240112714A1
公开(公告)日:2024-04-04
申请号:US17957591
申请日:2022-09-30
申请人: Intel Corporation
发明人: Nazila Haratipour , Christopher Neumann , Brian Doyle , Sou-Chi Chang , Bernal Granados Alpizar , Sarah Atanasov , Matthew Metz , Uygar Avci , Jack Kavalieros , Shriram Shivaraman
IPC分类号: G11C11/22 , H01L27/11507 , H01L49/02
CPC分类号: G11C11/221 , H01L27/11507 , H01L28/55
摘要: A memory device includes a group of ferroelectric capacitors with a shared plate that extends through the ferroelectric capacitors, has a greatest width between ferroelectric capacitors, and is coupled to an access transistor. The shared plate may be vertically between ferroelectric layers of the ferroelectric capacitors at the shared plate's greatest width. The memory device may include an integrated circuit die and be coupled to a power supply. Forming a group of ferroelectric capacitors includes forming an opening through an alternating stack of insulators and conductive plates, selectively forming ferroelectric material on the conductive plates rather than the insulators, and forming a shared plate in the opening over the ferroelectric material.
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公开(公告)号:US11901400B2
公开(公告)日:2024-02-13
申请号:US16369737
申请日:2019-03-29
申请人: Intel Corporation
发明人: Nazila Haratipour , Chia-Ching Lin , Sou-Chi Chang , Ashish Verma Penumatcha , Owen Loh , Mengcheng Lu , Seung Hoon Sung , Ian A. Young , Uygar Avci , Jack T. Kavalieros
IPC分类号: H01L49/02 , H01G4/012 , H01G4/30 , H01L23/522 , H10B51/00
CPC分类号: H01L28/56 , H01G4/012 , H01G4/30 , H01L23/5226 , H10B51/00
摘要: A capacitor is disclosed that includes a first metal layer and a seed layer on the first metal layer. The seed layer includes a polar phase crystalline structure. The capacitor also includes a ferroelectric layer on the seed layer and a second metal layer on the ferroelectric layer.
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