公开(公告)号：US20200343194A1

公开(公告)日：2020-10-29

申请号：US16393304

申请日：2019-04-24

Applicant: Intel Corporation

Inventor： Khang Choong YONG ,  Ying Ern HO ,  Yun Rou LIM ,  Wil Choon SONG ,  Stephen HALL

IPC: H01L23/552 ,  H01L23/66 ,  H01L23/00

Abstract: Embodiments include package substrates and method of forming the package substrates. A package substrate includes a dielectric over a conductive layer, and a conductive line on the dielectric. The package substrate includes a plurality of conductive bumps on a surface of the conductive line, where the conductive bumps are conductively coupled to the conductive line, and a solder resist over the conductive line and the dielectric. The surface of the conductive line may be a bottom surface, where the conductive bumps are below the conductive line and conductively coupled to the bottom surface of the conductive line, and where the conductive bumps may be embedded in the dielectric. The surface of the conductive line may be a top surface, where the conductive bumps are above the conductive line and conductively coupled to the top surface of the conductive line, and wherein the conductive bumps are embedded in the solder resist.

公开(公告)号：US20200314998A1

公开(公告)日：2020-10-01

申请号：US16369555

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Khang Choong YONG ,  Ying Ern HO ,  Wil Choon SONG ,  Yun Rou LIM ,  Telesphor KAMGAING

IPC: H05K1/02 ,  H05K3/02 ,  H05K3/18 ,  H05K1/09

Abstract: Embodiments herein relate to systems, apparatuses, processes or techniques directed to an impedance cushion coupled with a power plane to provide voltage for a system, where the impedance cushion is dimensioned to suppress resonance of the power plane to mitigate RFI or EMI emanating from the power plane during operation.