公开(公告)号：US20250123675A1

公开(公告)日：2025-04-17

申请号：US18990429

申请日：2024-12-20

Applicant: Intel Corporation

Inventor： Deepak Samuel Kirubakaran ,  Ho Jeong An ,  Nisha Aram ,  Sravya Atluri ,  Simonjit Dutta ,  Darwin Guo ,  Linlin Hou ,  Yishin Huang ,  Ho Kyu Kang ,  Brice Onken ,  Veeraraghavan Ramaraj ,  Cameron Rieck ,  Malavika Srinivas ,  Venkateshan Udhayan ,  Fidel Angel Vanegas Patino ,  Zhongsheng Wang ,  Ulises Zaragoza

IPC: G06F1/3296

Abstract: A component of a computing system, including: processor circuitry; and a non-transitory computer-readable storage medium including instructions that, when executed by the processor circuitry, cause the processor circuitry to: dynamically monitor runtime metrics across processor cores of the computing system, wherein the runtime metrics comprise a measure of system-critical task residency and a measure of user-critical foreground application utilization; and initiate a power optimization action configured to transition the computing system into a power efficiency mode when the system-critical task residency is below a system-critical task residency threshold and the user-critical foreground application utilization is below a user-critical foreground application utilization threshold.