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公开(公告)号:US20250123675A1
公开(公告)日:2025-04-17
申请号:US18990429
申请日:2024-12-20
Applicant: Intel Corporation
Inventor: Deepak Samuel Kirubakaran , Ho Jeong An , Nisha Aram , Sravya Atluri , Simonjit Dutta , Darwin Guo , Linlin Hou , Yishin Huang , Ho Kyu Kang , Brice Onken , Veeraraghavan Ramaraj , Cameron Rieck , Malavika Srinivas , Venkateshan Udhayan , Fidel Angel Vanegas Patino , Zhongsheng Wang , Ulises Zaragoza
IPC: G06F1/3296
Abstract: A component of a computing system, including: processor circuitry; and a non-transitory computer-readable storage medium including instructions that, when executed by the processor circuitry, cause the processor circuitry to: dynamically monitor runtime metrics across processor cores of the computing system, wherein the runtime metrics comprise a measure of system-critical task residency and a measure of user-critical foreground application utilization; and initiate a power optimization action configured to transition the computing system into a power efficiency mode when the system-critical task residency is below a system-critical task residency threshold and the user-critical foreground application utilization is below a user-critical foreground application utilization threshold.
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公开(公告)号:US10445118B2
公开(公告)日:2019-10-15
申请号:US15713301
申请日:2017-09-22
Applicant: Intel Corporation
Inventor: Xiangyang Guo , Simonjit Dutta , Han Lee , Yipeng Wang
Abstract: Methods, apparatus, systems, and articles of manufacture to facilitate field-programmable gate array support during runtime execution of computer readable instructions are disclosed herein. An example apparatus includes a compiler to, prior to runtime, compile a block of code written as high level source code into a first hardware bitstream kernel and a second hardware bitstream kernel; a kernel selector to select the first hardware bitstream kernel based on an attribute to be dispatched during runtime; a dispatcher to dispatch the first hardware bitstream kernel to a field programmable gate array (FPGA) during runtime; and the kernel selector to, when an FPGA attribute does not satisfy a threshold during runtime, adjust the selection of the first hardware bitstream kernel to the second hardware bitstream kernel to be dispatched during runtime.
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