公开(公告)号：US20240097043A1

公开(公告)日：2024-03-21

申请号：US18456832

申请日：2023-08-28

Applicant: Japan Display Inc.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takay TAMARU

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device according to an embodiment of the present invention includes an oxide insulating layer, an oxide semiconductor layer, a gate insulating layer, a gate electrode, and a protective insulating layer. The gate insulating layer includes a first region overlapping the gate electrode and a second region not overlapping the gate electrode. The second region is in contact with the protective insulating layer. The oxide insulating layer includes a third region overlapping the gate electrode and a fourth region not overlapping the gate electrode and the oxide semiconductor layer. The fourth region is in contact with the gate insulating layer. The oxide semiconductor layer includes a channel region, a source region, and a drain region. Each of the source region, the drain region, and the second region contains an impurity. A hydrogen concentration of the second region is greater than a hydrogen concentration of the first region.