公开(公告)号：US20250117323A1

公开(公告)日：2025-04-10

申请号：US18804343

申请日：2024-08-14

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： John Dongjun KIM ,  Jiho KIM

IPC: G06F12/02

Abstract: A flash-based storage device includes a flash memory device including a plurality of flash memory chips connected to a plurality of flash buses, and a storage device controller including a plurality of flash controllers connected to the plurality of flash buses. The plurality of flash buses form a channel supporting packet communication, and each flash controller is implemented to generate a control packet including a command or a data packet including a payload, and transmit packets to a target flash memory chip through the connected flash bus.

公开(公告)号：US20230350797A1

公开(公告)日：2023-11-02

申请号：US17819347

申请日：2022-08-12

Applicant: KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY

Inventor： JohnDongjun KIM ,  Jiho KIM ,  Myoungsoo JUNG

IPC: G06F12/02 ,  G06F11/07

CPC classification number: G06F12/0246 ,  G06F11/0793 ,  G06F11/073 ,  G06F2212/7208

Abstract: A flash memory device of a flash-based storage device includes a plurality of flash buses and a plurality of flash memory chips, and each flash bus is connected to two or more flash memory chips among the flash memory chips. A front-end includes a processing core, and a plurality of flash controllers are respectively connected to the flash buses. Each flash controller includes a flash controller logic configured to perform a read operation or a write operation in a flash memory chip connected to a corresponding flash bus among the flash buses, and a router configured to perform communication with another flash controller among the flash controllers.