公开(公告)号：US20050110041A1

公开(公告)日：2005-05-26

申请号：US10718426

申请日：2003-11-20

申请人： Karim Boutros ,  Nasser Karam ,  Dimitri Krut ,  Moran Haddad

发明人： Karim Boutros ,  Nasser Karam ,  Dimitri Krut ,  Moran Haddad

IPC分类号： H01L31/0328 ,  H01L31/18

CPC分类号： H01L31/1852 ,  H01L21/02381 ,  H01L21/02461 ,  H01L21/02543 ,  H01L21/02546 ,  Y02E10/544

摘要： A semiconductor device having at least one layer of a group III-V semiconductor material epitaxially deposited on a group III-V nucleation layer adjacent to a germanium substrate. By introducing electrical contacts on one or more layers of the semiconductor device, various optoelectronic and microelectronic circuits may be formed on the semiconductor device having similar quality to conventional group III-V substrates at a substantial cost savings. Alternatively, an active germanium device layer having electrical contacts may be introduced to a portion of the germanium substrate to form an optoelectronic integrated circuit or a dual optoelectronic and microelectronic device on a germanium substrate depending on whether the electrical contacts are coupled with electrical contacts on the germanium substrate and epitaxial layers, thereby increase the functionality of the semiconductor devices.

摘要翻译： 具有外延沉积在与锗衬底相邻的III-V族成核层上的III-V族半导体材料的至少一层的半导体器件。 通过在半导体器件的一个或多个层上引入电触点，可以以相当大的成本节约在各种半导体器件上形成各种光电子和微电子电路，其具有与常规III-V族基板相似的质量。 或者，可以将具有电接触的活性锗器件层引入锗衬底的一部分，以在锗衬底上形成光电子集成电路或双光电子和微电子器件，这取决于电接触是否与电接触 锗衬底和外延层，从而增加了半导体器件的功能。

公开(公告)号：US20060139739A1

公开(公告)日：2006-06-29

申请号：US10956231

申请日：2004-11-30

申请人： J. Higgins ,  Avijit Bhunia ,  Karim Boutros

发明人： J. Higgins ,  Avijit Bhunia ,  Karim Boutros

IPC分类号： H01S3/00

CPC分类号： H01Q3/46 ,  H03F3/08

摘要： The present invention is an array amplifier designed to alleviate thermal limitations and to provide better power combining efficiency for an array of high power density semiconductor devices. A semiconductor device having an aggregate size required to provide a desired output power is split into many small thermally isolated “unit cells”, each of which is equipped with antennas for input and for output. Power is combined ‘spatially’ off-chip, with each small unit cell operating at a moderate temperature which will not adversely affect performance.

摘要翻译： 本发明是一种设计用于减轻热限制并为高功率密度半导体器件阵列提供更好的功率组合效率的阵列放大器。 具有提供期望输出功率所需的聚集尺寸的半导体器件被分成许多小型热隔离“单元电池”，每个单元电池配备有用于输入和输出的天线。 功率在片外“空间”地组合，每个小单元在适中的温度下工作，这不会对性能产生不利影响。