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公开(公告)号:US11874213B2
公开(公告)日:2024-01-16
申请号:US17201853
申请日:2021-03-15
CPC分类号: G01N15/1434 , G01R27/02 , H03F3/08 , G01N2015/149
摘要: Aspects of the present disclosure include methods for adjusting sensitivity of a photodiode in a light detection system. Methods according to certain embodiments include detecting light with a light detection system having a photodiode and an amplifier, determining responsivity of the photodiode over a plurality of wavelengths of light and adjusting one or more parameters of the amplifier in response to the responsivity of the photodiode over the plurality of wavelengths of light. Systems (e.g., particle analyzers) having a light source and a light detection system that includes a photodiode and an amplifier for practicing the subject methods are also described. Non-transitory computer readable storage medium are also provided.
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公开(公告)号:US20180351519A1
公开(公告)日:2018-12-06
申请号:US16057699
申请日:2018-08-07
发明人: Michael P. Khaw
CPC分类号: H03F3/082 , H03F1/086 , H03F1/223 , H03F1/48 , H03F3/08 , H03F2200/36 , H03F2200/405 , H03F2200/408
摘要: A transimpedance amplifier with an input configured to receive a current input from an upstream device and output configured to present an output voltage. In one configuration, there are three amplifier stages in the transimpedance amplifier connected in series. A feedback path with feedback resistor connects between the input and output of the transimpedance amplifier. A bandwidth extender circuit connects between a stage output and a stage input of the transimpedance amplifier. In a three-stage embodiment, the bandwidth extender circuit extends between an input of the second stage and the output of the second stage. The bandwidth extender includes at least one active device configured to provide positive feedback to increase gain. The bandwidth extender circuit may be automatically or selectively deactivated to filter unwanted frequency components.
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公开(公告)号:US20180278339A1
公开(公告)日:2018-09-27
申请号:US15955609
申请日:2018-04-17
申请人: FINISAR CORPORATION
CPC分类号: H04B10/6911 , H03F1/52 , H03F3/08 , H03F3/50 , H03F2200/426 , H03F2200/453 , H04B10/693 , H05K999/99
摘要: A circuit may include amplifier circuitry configured to receive a current signal at an amplifier input node, convert the current signal to a voltage signal, and output the voltage signal at an amplifier output node. The circuit may also include overload circuitry configured to receive a replica DC input voltage and a replica DC output voltage. The overload circuitry may be further configured to detect that the current signal exceeds a threshold level based on the replica DC input voltage and the replica DC output voltage. In addition, the overload circuitry may be configured to, in response to and based on detecting that the current signal exceeds the threshold level, direct DC current of the current signal through a DC shunt path and direct AC current of the current signal through an AC shunt path. The AC shunt path may be different from the DC shunt path.
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公开(公告)号:US10056868B2
公开(公告)日:2018-08-21
申请号:US14808083
申请日:2015-07-24
申请人: ANALOG DEVICES, INC.
CPC分类号: H03F3/08 , A61B5/0059 , A61B5/02433 , A61B5/7225 , G01R27/26 , G01R27/2605 , G01R33/02 , G06F3/017 , H01L31/02019 , H03F3/087 , H03F3/45475 , H04B2210/003
摘要: An electrical circuit includes a sensor configured to generate a current signal comprising a first portion comprising a contribution from a target source and/or a second portion comprising a contribution from sources other than the target source, a trans-impedance amplifier that amplifies the current signal and generate a low noise signal, and a high pass filter that converts the low noise signal into an AC signal having a positive amplitude, a negative amplitude, and a zero cross-over point between the positive and negative amplitudes. The circuit also includes a positive integrating amplifier that receives the positive amplitude of the AC signal and generates a positive integrated value over an integration period, and a negative integrating amplifier that receives the negative amplitude of the AC signal and generates a negative integrated value over the integration period. The circuit further includes at least one analog-to-digital converter that receives the integrated values.
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公开(公告)号:US20180157780A1
公开(公告)日:2018-06-07
申请号:US15569931
申请日:2015-04-28
发明人: Frida ENG , Mikael GUSTAVSSON , Per LÖWENBORG , Martin OLSSON
IPC分类号: G06F17/50
CPC分类号: G06F17/5063 , G06F2217/02 , H03F1/30 , H03F1/32 , H03F1/3223 , H03F3/08 , H03F3/195 , H03F2200/294 , H03F2200/336 , H03F2200/447 , H03F2200/451 , H03F2200/468 , H03M1/1038 , H03M1/1052 , H03M1/12
摘要: Each realization of an electric circuit design defines a frequency response. For a test lot of the design, frequency responses are measured, each at a stable value of an environment parameter, wherein the totality of the values are distributed over a parameter range. Based on the measurements, a design-specific model is defined that describes a frequency response of the design in dependence of the environment parameter. For a unit in a main lot of realizations of the design, a unit-specific frequency response is measured at a stable value of the environment parameter; the model is fitted to the response, whereby a unit-specific model is obtained; data representing the unit-specific model is stored in association with the unit; and the unit is operated in conjunction with a compensation stage configured to determine a present value of the environment parameter and compensate drift in relation to a parameter-independent reference frequency response.
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公开(公告)号:US09893681B2
公开(公告)日:2018-02-13
申请号:US15405114
申请日:2017-01-12
CPC分类号: G01S17/102 , G06F17/5077 , G06F17/5081 , H03F1/26 , H03F1/42 , H03F3/08 , H03F3/082 , H03F3/085 , H03F3/087 , H03F3/45179 , H03F3/45475 , H03F2200/165 , H03F2203/45116 , H03G1/0047 , H03G3/3084
摘要: A method and circuit are provided for implementing enhanced CMOS inverter based optical Transimpedance Amplifiers (TIAs). A transimpedence amplifer (TIA) includes a photo-detector, and the TIA is formed by a first TIA inverter and a second TIA inverter. The first TIA inverter has an input from a cathode side of the photo-detector and the second inverter has an input from an anode side of the photo-detector. A replica TIA is formed by two replica inverters, coupled to a respective input to a first operational amplifier and a second operational amplifier. The first operational amplifier and the second operational amplifier have a feedback configuration for respectively regulating a set voltage level at the cathode side of the photo-detector input of the first inverter and at the anode side of the photo-detector input of the second inverter.
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公开(公告)号:US20170294970A1
公开(公告)日:2017-10-12
申请号:US15507924
申请日:2015-04-15
发明人: Daisuke MITA
CPC分类号: H04B10/616 , H03F1/083 , H03F3/08 , H03F3/45475 , H03F2200/408 , H03G3/3084 , H03G3/3089 , H04B10/00 , H04B10/611 , H04B10/615 , H04B10/6165 , H04B10/69 , H04B10/6911 , H04B10/693 , H04L7/027
摘要: An optical receiver includes an APD that converts an input optical signal into a current signal, a TIA that converts the current signal output from the APD into a voltage signal, an LIA that shapes a waveform of the voltage signal output from the TIA, an AOC having a time constant switching function, the AOC automatically compensating for an offset voltage between differential outputs from the TIA, and a convergence-state detection circuit that outputs, after detecting convergence completion of the automatic compensation in the AOC, to the AOC, a time constant switching control signal for switching a time constant from a high-speed time constant to a low-speed time constant.
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公开(公告)号:US09787272B2
公开(公告)日:2017-10-10
申请号:US14927885
申请日:2015-10-30
发明人: Chakravartula Nallani , Rahul Shringarpure , Georgios Asmanis , Faouzi Chaahoub , Kishan Venkataramu
CPC分类号: H03G3/3084 , H01L31/02016 , H03F1/083 , H03F1/22 , H03F1/32 , H03F3/08 , H03F3/45094 , H03F2200/294 , H03F2200/339 , H03F2200/405 , H03F2200/435 , H03F2200/78 , H03F2203/45374 , H03F2203/45396 , H03F2203/45562 , H03F2203/45644 , H03F2203/45702 , H03G5/28 , H04B10/40
摘要: An amplifier, a circuit, and an optical communication system are provided. The disclosed amplifier may include a first transistor receiving a first portion of an input signal received at the amplifier, a second transistor receiving a second portion of the input signal, an automatic gain control signal that is dynamically adjustable in response to variations in an output of the amplifier, and a varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the amplifier.
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公开(公告)号:US09768747B2
公开(公告)日:2017-09-19
申请号:US14997938
申请日:2016-01-18
申请人: Luxtera, Inc.
发明人: Stefan Barabas , Joseph Balardeta , Simon Pang , Scott Denton
CPC分类号: H03G3/30 , H03F1/086 , H03F1/42 , H03F1/56 , H03F3/08 , H03F3/082 , H03F3/087 , H03F2200/129 , H03F2200/156 , H03F2200/453 , H03G3/3084
摘要: Methods and systems for accurate gain adjustment of a transimpedance amplifier using a dual replica and servo loop is disclosed and may include, in a transimpedance amplifier (TIA) circuit comprising a first TIA, a second TIA, and a third TIA, each comprising a configurable feedback impedance, and a control loop, where the control loop comprises a gain stage with inputs coupled to outputs of the first and second TIAs and an output coupled to the configurable feedback impedance of the second and third TIAs: configuring a gain level of the first TIA by configuring its feedback impedance, configuring a gain level of the third TIA by configuring a reference current applied to an input of the first TIA, and amplifying a received electrical signal to generate an output voltage utilizing the third TIA. The reference current may generate a reference voltage at one of the inputs of the gain stage.
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公开(公告)号:US09755589B2
公开(公告)日:2017-09-05
申请号:US14047336
申请日:2013-10-07
申请人: FUJITSU LIMITED
发明人: Hideki Oku
摘要: An amplifier circuit includes: a first transistor and a second transistor of which collectors/drains are coupled to a first power-source via a first load-impedance-element and the first power-source via a second load-impedance-element, respectively; a gain-adjustment-resistance-element that is connected to an emitter/source of the first transistor and an emitter/source of the second transistor; a first current-source and a second current-source that are connected to the emitters/the sources of the first transistor and the second transistor respectively, and a second power-source; a third transistor and a fourth transistor of which collectors/drains are connected to the first power-source and bases/gates are connected to the first load-impedance-element and the second load-impedance-element, respectively; a first feedback-resistance-element that is connected to a base/gate of the first transistor and an emitter/source of the third transistor; and a second feedback-resistance-element that is connected to a base/gate of the second transistor and an emitter/source of the fourth transistor.
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