公开(公告)号：US20220066684A1

公开(公告)日：2022-03-03

申请号：US17147519

申请日：2021-01-13

Applicant: Kioxia Corporation

Inventor： Chihoko SHIGETA ,  Kazuya KITSUNAI

IPC: G06F3/06

Abstract: According to one embodiment, a memory system includes a first and second nonvolatile memory each including a plurality of memory cells; and a memory controller configured to perform, in parallel, a first set of write processes sequentially performed on the first nonvolatile memory, and a second set of write processes sequentially performed on the second nonvolatile memory. The memory controller is configured to change a setting of at least one unperformed write process among the first set and second set of write processes based on differences in progress between the first set and second set of write processes, the first set and second set of write processes being performed in parallel.