Abstract:
A display device and a gate driving panel circuit including the same are discussed. The gate driving panel circuit in an example includes an output buffer block configured to receive a clock signal and output a scan signal, and a logic block configured to control respective voltages of a Q node and a QB node electrically connected to the output buffer block. The output buffer block includes a pull-up transistor disposed between a clock node to which the clock signal is input and an output node to which the scan signal is output, and a pull-down transistor disposed between a gate low voltage node to which a gate low voltage is applied and the output node. A gate node of the pull-up transistor is electrically connected to the Q node.
Abstract:
Discussed is an organic light-emitting display panel including: an active area corresponding to an image display region; and a non-active area corresponding to a region outside of the active area, wherein the active area includes a plurality of signal lines arranged in an array, wherein the non-active area includes a pad region to which a source driver IC is mounted, and a switching structure, wherein the pad region includes a plurality of pads arranged in correspondence with the array of the signal lines, and wherein the switching structure includes: a common reference voltage pad-connection terminal connected to a common reference voltage pad of the display panel; a plurality of reference voltage line-connection terminals connected to a plurality of reference voltage lines of the display panel; and a switching circuit to switch connections between the common reference voltage pad-connection terminal and the plurality of reference voltage line-connection terminals.
Abstract:
A gate driving circuit and a light emitting display apparatus comprising the same are discussed, in which a charging characteristic of a control node is improved. The gate driving circuit comprises first to mth stage circuits, wherein each of the first to mth stage circuits includes first to third control nodes, a node control circuit controlling a voltage of each of the first to third control nodes, and an output buffer circuit outputting each of a scan signal, a sense signal and a carry signal in accordance with each of the first to third control nodes, the node control circuit including a node setup circuit charging a first gate high potential voltage in the first control node in response to a first carry signal supplied from a front stage circuit.
Abstract:
A gate driving circuit and a display apparatus including the same are disclosed, in which a plurality of gate lines may be driven through one stage circuit. The gate driving circuit includes first to mth stage circuits outputting a plurality of scan signals by dividing the scan signals into a first signal group and a second signal group. The first to mth stage circuits are grouped into k number of stage groups having two adjacent stage circuits, stage circuits of jth stage group (j is a natural number of 1 to k−1) output the scan signals of the first signal group to be earlier than the scan signals of the second signal group, and stage circuits of (j+1)th stage group output the scan signals of the second signal group to be earlier than the scan signals of the first signal group.
Abstract:
Embodiments of the present disclosure are related to a gate driving circuit and a display device, by a boot capacitor controlling a voltage level of a Q node at a timing that the gate driving circuit outputs a gate signal of a turn-on level and a pump capacitor controlling the voltage level of the Q node in a period that the gate signal of the turn-on level is output, a level of the gate signal can be maintained stably even in the case that the gate signal of the turn-on level is output in a long time.
Abstract:
By forming a repair structure in a horizontal direction and vertical direction by using one or more repair lines between two or more pixels adjacent to each other in a display panel, even though a dark spot appears due to a defective operation of one pixel, the one pixel may be compensated to be driven by using the other pixel.
Abstract:
The present disclosure relates to a display panel and a display device, and can provide a display panel and a display device that have a clock signal line arrangement structure that is advantageous to electrostatic discharge.
Abstract:
A display panel comprising a display area including a plurality of subpixels, a gate driving circuit disposed in a non-display area outside the display area to supply a plurality of scan signals to the plurality of subpixels, and a plurality of gate high-potential voltage lines which are disposed in the non-display area for transferring a plurality of gate high-potential voltages to the gate driving circuit, wherein plurality of gate high-potential voltage lines include a first gate high-potential voltage line transferring a first gate high-potential voltage for charging a first node of the gate driving circuit, a second gate high-potential voltage line transferring a second gate high-potential voltage for charging a second node of the gate driving circuit, and a third gate high-potential voltage line which is branched from the first gate high-potential voltage line for transferring a third gate high-potential voltage to stabilize a transistor controlling the first node.
Abstract:
An organic light emitting display device and a method of repairing the device are discussed. According to an embodiment, the device includes a display panel having pixels, each including an OLED in every pixel area defined as scan and data lines intersect with each other and having a repair structure in at least one of horizontal and vertical directions between adjacent pixels by one or more repair lines; a timing controller configured to generate compensation data when a dark spot is generated in one of the plurality of pixels of the display panel, and adjust a magnitude of image data according to the compensation data; and a data driver configured to adjust a magnitude of a data voltage according to the image data adjusted in magnitude, and output the data voltage adjusted in magnitude to the data lines.
Abstract:
Disclosed are an organic light emitting display device and a display panel thereof, which are capable of performing a recovery driving for recovering a threshold voltage of a driving transistor to be within a range of compensation for the threshold voltage if the threshold voltage of the driving transistor deviates from the range of the compensation for the threshold voltage as a driving time of the driving transistor of a pixel increases.