System and method for dynamic pipelining of direct memory access (DMA) transactions

    公开(公告)号:US10552349B1

    公开(公告)日:2020-02-04

    申请号:US16008084

    申请日:2018-06-14

    发明人: Amir Shavit Roy Geron

    IPC分类号: G06F13/36 G06F13/16 G06F13/28

    摘要: A method and a system for pipelining read transactions of a host computer from a storage module, including: transferring from a host computer to an accelerator a read list, including at least one pointer to a data block stored on the storage module, and a respective data block size; sending an acknowledgement to the host; fetching at least one data block by the accelerator from the storage module, and writing it to a staging buffer in a sequential order; sending at least one read request from the host computer to the accelerator, relating to at least one requested data block. If the data block is available on the staging buffer, then sending the corresponding data to the host from the staging buffer. Otherwise the read response is delayed until the requested data is fetched from the storage module.