公开(公告)号：US20240370379A1

公开(公告)日：2024-11-07

申请号：US18143623

申请日：2023-05-05

Applicant: MEDIATEK INC.

Inventor： Chun-Ming Su ,  Chih-Wei Hung ,  Yi-Lun Lin ,  Kun-Lung Chen ,  Po-Han Wang ,  Ming-Hung Hsieh ,  Yun-Ching Li

IPC: G06F12/126 ,  G06F12/1009

Abstract: An electronic device includes a memory usage identification circuit and a system-level cache (SLC). The memory usage identification circuit obtains a memory usage indicator that depends on memory usage of a storage space allocated in a system memory at which memory access is requested by a physical address. The SLC includes a cache memory and a cache controller. The cache controller performs cache management upon the cache memory according to the physical address and the memory usage indicator.