公开(公告)号：US09660615B2

公开(公告)日：2017-05-23

申请号：US14608723

申请日：2015-01-29

Applicant: MediaTek Inc.

Inventor： Meng-Cheng Peng ,  Rei-Fu Huang

IPC: H03K3/289 ,  H03K3/356 ,  H03K3/012 ,  H03K3/037

CPC classification number: H03K3/012 ,  H03K3/0372

Abstract: A flip-flop device is provided. The flip-flop device includes a first flip-flop and a clock controller. The first flip-flop receives a first clock signal and a second clock signal for operation. The clock controller receives a clock source signal and generates the first clock signal and the second clock signal according to the clock source signal. Each of the first clock signal and the second clock signal switches between a first voltage level and a second voltage level. For each of the first clock signal and the second clock signal, a period of the first voltage level is shorter than a period of the second voltage level. The period of the first voltage level of the first clock signal and the period of the first voltage level of the second clock signal are non-overlapping.