公开(公告)号：US20200301860A1

公开(公告)日：2020-09-24

申请号：US16810031

申请日：2020-03-05

Applicant: MediaTek Inc.

Inventor： Chia-Hao Hsu ,  Sen-Yu Cheng ,  Yan-Ting Chen ,  Po-Kai Chi

IPC: G06F13/24 ,  G06F1/3293

Abstract: A multi-processor system handles interrupts using a power and performance status of each processor and a usage scenario of each processor. The power and performance status is indicated by factors that affect power consumption and processor performance. The system identifies one of the processors for handling an interrupt based on a weighted combination of the factors. Each factor is weighted based on a usage scenario for which the interrupt was generated. The system then dispatches the interrupt to the identified one of the processors.

公开(公告)号：US11113216B2

公开(公告)日：2021-09-07

申请号：US16810031

申请日：2020-03-05

Applicant: MediaTek Inc.

Inventor： Chia-Hao Hsu ,  Sen-Yu Cheng ,  Yan-Ting Chen ,  Po-Kai Chi

IPC: G06F13/24 ,  G06F1/3293 ,  G06F9/48

Abstract: A multi-processor system handles interrupts using a power and performance status of each processor and a usage scenario of each processor. The power and performance status is indicated by factors that affect power consumption and processor performance. The system identifies one of the processors for handling an interrupt based on a weighted combination of the factors. Each factor is weighted based on a usage scenario for which the interrupt was generated. The system then dispatches the interrupt to the identified one of the processors.

公开(公告)号：US10089265B2

公开(公告)日：2018-10-02

申请号：US15186325

申请日：2016-06-17

Applicant: Mediatek Inc.

Inventor： Chia-Hao Hsu ,  Shun-Chih Yu ,  Sen-Yu Cheng

IPC: G06F13/24

Abstract: Systems, methods, and computer readable medium are provided that improve the management of interrupt requests in multiple processor computer systems. Interrupt requests can be classified into three categories and the structure of the categories provide for specifying a list that needs to be migrated. The list can contain only those interrupt requests that can be handled by some of the processors that will never unplug or based on affinity. When a processor is about to unplug, the computer system can migrate that list. The system can also manage the other interrupt requests.