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公开(公告)号:US20210103527A1
公开(公告)日:2021-04-08
申请号:US17124312
申请日:2020-12-16
Applicant: Micron Technology, Inc.
Inventor: Shea M. Morrison , Brenton P. Van Leeuwen , Blakely N. Frechette
Abstract: Apparatuses and methods related to memory disablement for memory security. Disabling the memory for memory security can include, responsive to receiving a trigger signal, provide a voltage, which may be in excess of an operating or nominal voltage, to the access circuitry. The voltage may thus be sufficient to render the access circuitry inoperable for accessing data stored in the memory array.
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公开(公告)号:US10884951B2
公开(公告)日:2021-01-05
申请号:US16204656
申请日:2018-11-29
Applicant: Micron Technology, Inc.
Inventor: Shea M. Morrison , Brenton P. Van Leeuwen , Blakely N. Frechette
Abstract: Apparatuses and methods related to memory disablement for memory security. Disabling the memory for memory security can include, responsive to receiving a trigger signal, provide a voltage, which may be in excess of an operating or nominal voltage, to the access circuitry. The voltage may thus be sufficient to render the access circuitry inoperable for accessing data stored in the memory array.
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公开(公告)号:US11474955B2
公开(公告)日:2022-10-18
申请号:US17124312
申请日:2020-12-16
Applicant: Micron Technology, Inc.
Inventor: Shea M. Morrison , Brenton P. Van Leeuwen , Blakely N. Frechette
Abstract: Apparatuses and methods related to memory disablement for memory security. Disabling the memory for memory security can include, responsive to receiving a trigger signal, provide a voltage, which may be in excess of an operating or nominal voltage, to the access circuitry. The voltage may thus be sufficient to render the access circuitry inoperable for accessing data stored in the memory array.
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公开(公告)号:US20200174948A1
公开(公告)日:2020-06-04
申请号:US16204656
申请日:2018-11-29
Applicant: Micron Technology, Inc.
Inventor: Shea M. Morrison , Brenton P. Van Leeuwen , Blakely N. Frechette
Abstract: Apparatuses and methods related to memory disablement for memory security. Disabling the memory for memory security can include, responsive to receiving a trigger signal, provide a voltage, which may be in excess of an operating or nominal voltage, to the access circuitry. The voltage may thus be sufficient to render the access circuitry inoperable for accessing data stored in the memory array.
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