公开(公告)号：US11455107B2

公开(公告)日：2022-09-27

申请号：US16666351

申请日：2019-10-28

Applicant: Micron Technology, Inc.

Inventor： Suresh Rajgopal ,  Ling Wang ,  Yue Wei ,  Vamsi Pavan Rayaprolu

IPC: G06F3/06

Abstract: A method is implemented for a memory sub-system that detects a sequential write pattern in a write sequence for a memory device in a set of commands received from a host, detects current bandwidth utilization deviating from a write bandwidth utilization performance target, in response to detecting the sequential write pattern, and adjusts write bandwidth utilization to conform to the write bandwidth utilization target, in response to detecting the current bandwidth utilization deviating from the write bandwidth utilization performance target.