公开(公告)号：US20240039656A1

公开(公告)日：2024-02-01

申请号：US17815912

申请日：2022-07-28

Applicant: Micron Technology, Inc.

Inventor： Zhanqiang Su ,  Junjun Wang

IPC: H04L1/00 ,  H04L1/20 ,  H04L1/18

CPC classification number: H04L1/0061 ,  H04L1/203 ,  H04L1/1819

Abstract: Methods, systems, and devices for enhanced negative acknowledgment control (NAC) frame are described. A device may generate and communicate an enhanced NAC frame that includes additional error information to indicate to the device a cause for the error. The device may receive a data frame and determine an error condition associated with a set of layers of a protocol stack. The device may generate feedback indicating a cause for the determined error condition and transmit the feedback indicating the error cause. The feedback may be a NAC that includes a first quantity of bits configured for indicating an existence of an error and a second quantity of bits configured for indicating the error cause. A format of the NAC frame may include bits configured to identify multiple types of error causes associated with the different layers of the protocol stack.

公开(公告)号：US20250080273A1

公开(公告)日：2025-03-06

申请号：US18830459

申请日：2024-09-10

Applicant: Micron Technology, Inc.

Inventor： Zhanqiang Su ,  Junjun Wang

IPC: H04L1/00 ,  H04L1/1812 ,  H04L1/20

Abstract: Methods, systems, and devices for enhanced negative acknowledgment control (NAC) frame are described. A device may generate and communicate an enhanced NAC frame that includes additional error information to indicate to the device a cause for the error. The device may receive a data frame and determine an error condition associated with a set of layers of a protocol stack. The device may generate feedback indicating a cause for the determined error condition and transmit the feedback indicating the error cause. The feedback may be a NAC that includes a first quantity of bits configured for indicating an existence of an error and a second quantity of bits configured for indicating the error cause. A format of the NAC frame may include bits configured to identify multiple types of error causes associated with the different layers of the protocol stack.

公开(公告)号：US12101183B2

公开(公告)日：2024-09-24

申请号：US17815912

申请日：2022-07-28

Applicant: Micron Technology, Inc.

Inventor： Zhanqiang Su ,  Junjun Wang

IPC: H04L1/00 ,  H04L1/1812 ,  H04L1/20

CPC classification number: H04L1/0061 ,  H04L1/1819 ,  H04L1/203

Abstract: Methods, systems, and devices for enhanced negative acknowledgment control (NAC) frame are described. A device may generate and communicate an enhanced NAC frame that includes additional error information to indicate to the device a cause for the error. The device may receive a data frame and determine an error condition associated with a set of layers of a protocol stack. The device may generate feedback indicating a cause for the determined error condition and transmit the feedback indicating the error cause. The feedback may be a NAC that includes a first quantity of bits configured for indicating an existence of an error and a second quantity of bits configured for indicating the error cause. A format of the NAC frame may include bits configured to identify multiple types of error causes associated with the different layers of the protocol stack.

公开(公告)号：US20240297928A1

公开(公告)日：2024-09-05

申请号：US18590755

申请日：2024-02-28

Applicant: Micron Technology, Inc.

Inventor： Junjun Wang ,  Zhanqiang Su

IPC: H04L69/40 ,  G06F11/14 ,  H04L69/323 ,  H04L69/324

CPC classification number: H04L69/40 ,  G06F11/1441 ,  H04L69/323 ,  H04L69/324

Abstract: Methods, systems, and devices for reset techniques for protocol layers of a memory system are described. A communications link may be established between a host system and the memory system. In some examples, the communications link may be based on one or more first parameters associated with a first protocol layer and one or more second parameters associated with a second protocol layer. The system may support communication (e.g., from the host system to the memory system) of an indication to reset the communications link, and the host system, the memory system, or both may reset the one or more first parameters based on communicating the indication to reset the communications link. The host system and memory system may attempt to reestablish the communications link based on resetting the one or more first parameters and maintaining the one or more second parameters.