公开(公告)号：US09984257B2

公开(公告)日：2018-05-29

申请号：US15088309

申请日：2016-04-01

Applicant: NXP B.V.

Inventor： Peter Van De Haar ,  Franciscus Widdershoven

IPC: H04L29/06 ,  G06F21/88 ,  G06F21/73 ,  G06F21/75 ,  G06F21/86 ,  H01L23/00

CPC classification number: G06F21/88 ,  G06F21/73 ,  G06F21/75 ,  G06F21/86 ,  G06F2221/2103 ,  H01L23/576

Abstract: A secure electronic apparatus and a method for determining that a secure electronic apparatus has been tampered with. The apparatus includes a memory and a plurality of sensors which each to receive an input signal and output a digital signal determined by the input signal and by a physical quantity sensed by the sensor (e.g. capacitance). A measurement routine includes applying a plurality of input signal values to the sensors and, for each input signal value, using the digital output signals of each sensor to determine a combined output result. The combined output results of the measurement routine are compared with a set of combined output results stored in the memory. A detected a difference between the combined output results of the measurement routine and the set of combined output results stored in the memory can be used to determine that the secure electronic apparatus has been tampered with.

公开(公告)号：US10119839B2

公开(公告)日：2018-11-06

申请号：US15135533

申请日：2016-04-21

Applicant: NXP B.V.

Inventor： Rameswor Shrestha ,  Franciscus Widdershoven

IPC: G01R27/26 ,  G01D5/24 ,  G06F3/044 ,  H03K17/96

Abstract: A sensor circuit and method. The circuit includes a first subcircuit that includes a first sense capacitor, a first integration capacitor, and a first clock input for receiving a first digital clock signal for initiating discharge of the first integration capacitor at time T. The circuit includes a second subcircuit that includes a second sense capacitor, a second integration capacitor, and a second clock input for receiving a second digital clock signal for initiating discharge of the second integration capacitor at time T+Td. A rate of discharge of the first and second integration capacitors is at least partly determined by a capacitance of the first and second sense capacitor, respectively. At time Teval, after initiation of discharge of the first and second sense capacitors, the extent to which the first and second integration capacitors have discharged is compared. A digital signal indicating the result of the comparison is outputted.

公开(公告)号：US20170023382A1

公开(公告)日：2017-01-26

申请号：US15135533

申请日：2016-04-21

Applicant: NXP B.V.

Inventor： Rameswor Shrestha ,  Franciscus Widdershoven

IPC: G01D5/24

CPC classification number: G01D5/24 ,  G01R27/2605 ,  G06F3/044 ,  H03K17/9622 ,  H03K2217/960725 ,  H03K2217/96074 ,  H03K2217/960745

Abstract: A sensor circuit and method. The circuit includes a first subcircuit that includes a first sense capacitor, a first integration capacitor, and a first clock input for receiving a first digital clock signal for initiating discharge of the first integration capacitor at time T. The circuit includes a second subcircuit that includes a second sense capacitor, a second integration capacitor, and a second clock input for receiving a second digital clock signal for initiating discharge of the second integration capacitor at time T+Td. A rate of discharge of the first and second integration capacitors is at least partly determined by a capacitance of the first and second sense capacitor, respectively. At time Teval, after initiation of discharge of the first and second sense capacitors, the extent to which the first and second integration capacitors have discharged is compared. A digital signal indicating the result of the comparison is outputted.

Abstract translation: 传感器电路及方法。 电路包括第一子电路，其包括第一感测电容器，第一积分电容器和第一时钟输入端，用于在时间T接收用于启动第一积分电容器放电的第一数字时钟信号。该电路包括第二子电路，其包括 第二感测电容器，第二积分电容器和第二时钟输入端，用于接收第二数字时钟信号，以在时间T + Td启动第二积分电容器的放电。 第一和第二积分电容器的放电率至少部分地由第一和第二感测电容器的电容决定。 在Teval时刻，在第一和第二感测电容器的放电开始之后，比较第一和第二积分电容器放电的程度。 输出表示比较结果的数字信号。