公开(公告)号：US08681086B2

公开(公告)日：2014-03-25

申请号：US13722326

申请日：2012-12-20

Applicant: Novatek Microelectronics Corp.

Inventor： Yu-Hsun Peng ,  Hsi-Chi Ho ,  Li-Chun Huang

IPC: G09G3/36

CPC classification number: G09G5/00 ,  G09G3/3688 ,  G09G2310/0289 ,  G09G2310/0297

Abstract: A data driver includes two data processing circuits for respectively providing positive and negative pixel voltages according to first and second pixel data, and a multiplexer circuit including multiplexer units. Each multiplexer unit has first and second input terminals respectively receiving the positive and negative pixel voltages, and an output terminal coupled to a data line. A first switching device has first and second switches serially coupled between the first input and output terminals. A node between the first and second switches is selectively grounded via a third switch. A second switching device has fourth and fifth switches serially coupled between the second input and output terminals. A node between the fourth and fifth switches is selectively grounded via a sixth switch. When the first and second switches turn on, the sixth switch turns on. When the fourth and fifth switches turn on, the third switch turns on.

Abstract translation: 数据驱动器包括用于分别根据第一和第二像素数据提供正和负像素电压的两个数据处理电路，以及包括多路复用器单元的多路复用器电路。 每个多路复用器单元具有分别接收正像素电压和负像素电压的第一和第二输入端子以及耦合到数据线的输出端子。 第一开关装置具有串联耦合在第一输入端和输出端之间的第一和第二开关。 第一和第二开关之间的节点经由第三开关选择性接地。 第二开关器件具有串联耦合在第二输入和输出端子之间的第四和第五开关。 第四开关和第五开关之间的节点通过第六开关选择性接地。 当第一和第二开关导通时，第六开关导通。 当第四和第五开关导通时，第三开关导通。

公开(公告)号：US20160133231A1

公开(公告)日：2016-05-12

申请号：US14918549

申请日：2015-10-20

Applicant: Novatek Microelectronics Corp.

Inventor： Shang-I Liu ,  Li-Chun Huang ,  Ching-Chun Lin ,  Chia-Hsin Tung ,  Chien-Yu Chen ,  Hung-Wei Lin

IPC: G09G5/18

CPC classification number: G09G5/14 ,  G09G5/003 ,  G09G2330/021 ,  G09G2340/12 ,  G09G2360/18

Abstract: In the disclosure, a display driver integrated circuit (DDIC) configured to drive a display panel and an electronic apparatus having the DDIC would generate display data to constantly update information displayed on the display panel even when a processor is in a power save mode. The DDIC includes a first input terminal, a memory device, an information rendering unit, an information overlay unit, and a source driver. The first input terminal receives a subscribed signal. The memory device stores a background image. The information rendering unit is coupled to the first input terminal of the DDIC to receive the subscribed signal and renders subscribed information according to the subscribed signal. The information overlay unit receives the subscribed information from the information overlay unit and the background image from the memory device, and accordingly, the display data is generated without obtaining frame data from an external processor.

Abstract translation: 在本公开中，即使处理器处于省电模式，配置为驱动显示面板的显示驱动器集成电路（DDIC）和具有DDIC的电子设备也将产生显示数据，以不断地更新显示在显示面板上的信息。 DDIC包括第一输入端，存储器件，信息渲染单元，信息覆盖单元和源驱动器。 第一输入端接收订阅信号。 存储设备存储背景图像。 信息渲染单元耦合到DDIC的第一输入端以接收订阅的信号，并根据订阅的信号呈现订阅的信息。 信息叠加单元从信息叠加单元接收订阅信息和来自存储设备的背景图像，因此，在不从外部处理器获取帧数据的情况下生成显示数据。

公开(公告)号：US09001019B2

公开(公告)日：2015-04-07

申请号：US14197857

申请日：2014-03-05

Applicant: Novatek Microelectronics Corp.

Inventor： Yu-Hsun Peng ,  Hsi-Chi Ho ,  Li-Chun Huang

IPC: G09G3/36 ,  G09G5/00

CPC classification number: G09G5/00 ,  G09G3/3688 ,  G09G2310/0289 ,  G09G2310/0297

Abstract: A data driver includes two data processing circuits for respectively providing positive and negative pixel voltages according to first and second pixel data, and a multiplexer circuit including multiplexer units. Each multiplexer unit has first and second input terminals respectively receiving the positive and negative pixel voltages, and an output terminal coupled to a data line. A first switching device has first and second switches serially coupled between the first input and output terminals. A node between the first and second switches is selectively grounded via a third switch. A second switching device has fourth and fifth switches serially coupled between the second input and output terminals. A node between the fourth and fifth switches is selectively grounded via a sixth switch. When the first and second switches turn on, the sixth switch turns on. When the fourth and fifth switches turn on, the third switch turns on.

Abstract translation: 数据驱动器包括用于分别根据第一和第二像素数据提供正和负像素电压的两个数据处理电路，以及包括多路复用器单元的多路复用器电路。 每个多路复用器单元具有分别接收正像素电压和负像素电压的第一和第二输入端子以及耦合到数据线的输出端子。 第一开关装置具有串联耦合在第一输入端和输出端之间的第一和第二开关。 第一和第二开关之间的节点经由第三开关选择性接地。 第二开关器件具有串联耦合在第二输入和输出端子之间的第四和第五开关。 第四开关和第五开关之间的节点通过第六开关选择性接地。 当第一和第二开关导通时，第六开关导通。 当第四和第五开关导通时，第三开关导通。