公开(公告)号：US10943556B2

公开(公告)日：2021-03-09

申请号：US16909934

申请日：2020-06-23

Applicant: NOVATEK Microelectronics Corp.

Inventor： Peng-Yu Chen ,  Yu-Shao Liu

IPC: G09G3/36

Abstract: A data driver for driving a display panel includes a first driving channel coupled to a polarity inversion circuit and configured to generate a first data voltage signal having a positive polarity output to the display panel according to a plurality of first pixel data; a second driving channel coupled to the polarity inversion circuit and configured to generate a second data voltage signal having a negative polarity output to the display panel according to a plurality of second pixel data; wherein the first data voltage signal is output to first output node through the polarity inversion circuit during a first line period and the second data voltage signal is output to the first output node through the polarity inversion circuit during a second line period after the first line period, and the first line period and the second line period respectively belong to two consecutive frame periods.

公开(公告)号：US10902816B2

公开(公告)日：2021-01-26

申请号：US15787710

申请日：2017-10-19

Applicant: Novatek Microelectronics Corp.

Inventor： Yu-Shao Liu

IPC: G09G3/36 ,  G09G3/20 ,  G09G5/00 ,  H03K19/0175

Abstract: A driving integrated circuit (IC) and a fan-out compensation method thereof are provided. The driving IC includes a plurality of driving channel circuits, a plurality of output buffer circuits and a compensation control circuit. The input terminals of the output buffer circuits are coupled to the output terminals of the driving channel circuits in a one-to-one manner. The output terminals of the output buffer circuits are coupled a plurality of data lines of a display panel in a one-to-one manner. The compensation control circuit is coupled to the output buffer circuits for adjusting the slew rate of the output terminals of the output buffer circuits to compensate difference in delay times between the data lines of the display panel.

公开(公告)号：US11367373B1

公开(公告)日：2022-06-21

申请号：US17168150

申请日：2021-02-04

Applicant: Novatek Microelectronics Corp.

Inventor： Hsiu-Hui Yang ,  Yu-Shao Liu

IPC: G09G5/00 ,  G09G3/20

Abstract: A driver integrated circuit, including multiple output pads, multiple switching circuits, and multiple data channel circuits, is provided. The output pads and the switching circuits are arranged in a pad area of the driver integrated circuit. The output pads include a first output pad and a second output pad, and the switching circuits include a first switching circuit. A first selection terminal of the first switching circuit is coupled to the first output pad. A second selection terminal of the first switching circuit is coupled to the second output pad. The data channel circuits are arranged in a function circuit area of the driver integrated circuit. The data channel circuits include a first data channel circuit. An output terminal of the first data channel circuit is coupled to a common terminal of the first switching circuit.

公开(公告)号：US11823602B2

公开(公告)日：2023-11-21

申请号：US17727837

申请日：2022-04-25

Applicant: Novatek Microelectronics Corp.

Inventor： Hsiu-Hui Yang ,  Yu-Shao Liu

IPC: G09G5/00 ,  G09G3/20

CPC classification number: G09G3/20 ,  G09G2300/08 ,  G09G2320/0219

Abstract: A layout arrangement of a driver integrated circuit includes multiple output pads, a plurality of switching circuits, and multiple data channel circuits. The output pads include a first output pad and a second output pad and are configurable to be coupled to a plurality of data lines. The switching circuits include a first switching circuit. A first selection terminal of the first switching circuit is coupled to the first output pad via a first connecting wire. A second selection terminal of the first switching circuit is coupled to the second output pad via a second connecting wire. The data channel circuits include a first data channel circuit. An output terminal of the first data channel circuit is coupled to a common terminal of the first switching circuit via a third connecting wire. The third connecting wire is longer than the first connecting wire and the second connecting wire.

公开(公告)号：US20220246077A1

公开(公告)日：2022-08-04

申请号：US17727837

申请日：2022-04-25

Applicant: Novatek Microelectronics Corp.

Inventor： Hsiu-Hui Yang ,  Yu-Shao Liu

IPC: G09G3/20

Abstract: A layout arrangement of a driver integrated circuit includes multiple output pads, a plurality of switching circuits, and multiple data channel circuits. The output pads include a first output pad and a second output pad and are configurable to be coupled to a plurality of data lines. The switching circuits include a first switching circuit. A first selection terminal of the first switching circuit is coupled to the first output pad via a first connecting wire. A second selection terminal of the first switching circuit is coupled to the second output pad via a second connecting wire. The data channel circuits include a first data channel circuit. An output terminal of the first data channel circuit is coupled to a common terminal of the first switching circuit via a third connecting wire. The third connecting wire is longer than the first connecting wire and the second connecting wire.

公开(公告)号：US20140210698A1

公开(公告)日：2014-07-31

申请号：US13974069

申请日：2013-08-23

Applicant: NOVATEK Microelectronics Corp.

Inventor： Ju-Lin Huang ,  Che-Lun Hsu ,  Yu-Shao Liu

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G2330/023 ,  G09G2330/06

Abstract: A driving method for reducing EMI in a driving device includes detecting a voltage difference between a first display voltage and a second display voltage which correspond to the same pixel, for generating a detecting signal; and adjusting an operating method of a charge sharing switch utilized for performing charge sharing in the driving device according to the detecting signal.

Abstract translation: 用于降低驱动装置中的EMI的驱动方法包括检测对应于相同像素的第一显示电压和第二显示电压之间的电压差，以产生检测信号; 以及调整用于根据检测信号在驱动装置中执行电荷共享的电荷共享开关的操作方法。

公开(公告)号：US20140043313A1

公开(公告)日：2014-02-13

申请号：US14058304

申请日：2013-10-21

Applicant: Novatek Microelectronics Corp.

Inventor： Chih-Jen Yen ,  Yueh-Hsiu Liu ,  Ju-Lin Huang ,  Peng-Yu Chen ,  Yu-Shao Liu

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0673

Abstract: A gamma-voltage generator is provided to generating a plurality of first gamma voltages and second gamma voltages. At least one of the first gamma voltages generated by DACs of the gamma-voltage generator within a first frame period and at least one of the second gamma voltages generated by the DACs within a second frame period are outputted from a same one of the gamma buffers of the gamma-voltage generator, whereby the transmitted gamma voltages have substantially equal offset. Therefore, the display quality approaches an ideal condition.

Abstract translation: 提供伽马电压发生器以产生多个第一伽马电压和第二伽马电压。 在第一帧周期内由伽马电压发生器的DAC产生的第一伽马电压中的至少一个和由第二帧周期内的DAC产生的第二伽马电压中的至少一个从相同的一个伽马缓冲器输出 的γ电压发生器，由此所传输的伽马电压具有基本相等的偏移。 因此，显示质量接近理想状态。

公开(公告)号：US10991290B1

公开(公告)日：2021-04-27

申请号：US17064640

申请日：2020-10-07

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Hsiu-Hui Yang ,  Yu-Shao Liu ,  Chin-Hung Hsu ,  Yen-Cheng Cheng

IPC: G09G3/20

Abstract: Control methods of a channel setting module applied to a display panel are provided. The display panel has gate lines, source lines, and pixels. The pixels are arranged in matrix. The pixels disposed at the same row are electrically connected to the same gate line, and the pixels disposed at the same column are electrically connected to the same source line. The adoption of the channel setting module reduces the control signals required by the source lines. The channel setting module includes operational amplifiers and de-mux switches, and the control methods dynamically determine conduction states of the de-mux switches. The voltage outputs of the operational amplifiers are selectively outputted to the source lines, depending on conduction statuses of the de-mux switches. By applying the control methods, the interference between the source lines are reduced, and the instantaneous overshoots/undershoots of floating channels are depressed.

公开(公告)号：US20180293955A1

公开(公告)日：2018-10-11

申请号：US15787710

申请日：2017-10-19

Applicant: Novatek Microelectronics Corp.

Inventor： Yu-Shao Liu

IPC: G09G5/00 ,  H03K19/0175

Abstract: A driving integrated circuit (IC) and a fan-out compensation method thereof are provided. The driving IC includes a plurality of driving channel circuits, a plurality of output buffer circuits and a compensation control circuit. The input terminals of the output buffer circuits are coupled to the output terminals of the driving channel circuits in a one-to-one manner. The output terminals of the output buffer circuits are coupled a plurality of data lines of a display panel in a one-to-one manner. The compensation control circuit is coupled to the output buffer circuits for adjusting the slew rate of the output terminals of the output buffer circuits to compensate difference in delay times between the data lines of the display panel.

公开(公告)号：US09013392B2

公开(公告)日：2015-04-21

申请号：US14058304

申请日：2013-10-21

Applicant: Novatek Microelectronics Corp.

Inventor： Chih-Jen Yen ,  Yueh-Hsiu Liu ,  Ju-Lin Huang ,  Peng-Yu Chen ,  Yu-Shao Liu

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3614 ,  G09G3/3688 ,  G09G2310/027 ,  G09G2310/0297 ,  G09G2320/0673

Abstract: A gamma-voltage generator is provided to generating a plurality of first gamma voltages and second gamma voltages. At least one of the first gamma voltages generated by DACs of the gamma-voltage generator within a first frame period and at least one of the second gamma voltages generated by the DACs within a second frame period are outputted from a same one of the gamma buffers of the gamma-voltage generator, whereby the transmitted gamma voltages have substantially equal offset. Therefore, the display quality approaches an ideal condition.

Abstract translation: 提供伽马电压发生器以产生多个第一伽马电压和第二伽马电压。 在第一帧周期内由伽马电压发生器的DAC产生的第一伽马电压中的至少一个和由第二帧周期内的DAC产生的第二伽马电压中的至少一个从相同的一个伽马缓冲器输出 的γ电压发生器，由此所传输的伽马电压具有基本相等的偏移。 因此，显示质量接近理想状态。