Abstract:
A gamma-voltage generator is provided to generating a plurality of first gamma voltages and second gamma voltages. At least one of the first gamma voltages generated by DACs of the gamma-voltage generator within a first frame period and at least one of the second gamma voltages generated by the DACs within a second frame period are outputted from a same one of the gamma buffers of the gamma-voltage generator, whereby the transmitted gamma voltages have substantially equal offset. Therefore, the display quality approaches an ideal condition.
Abstract:
A driving circuit of flat display including a charging circuit path, a discharging circuit path, and a detecting circuit is provided. The charging circuit path has first and second impedance states, wherein an impedance value of the first impedance state is smaller than that of the second impedance state. The discharging circuit path has third and fourth impedance states, wherein an impedance value of the third impedance state is smaller than that of the fourth impedance state. The detecting circuit detects whether the charging circuit path or the discharging circuit path is in an unstable first state or stable second state, controls the charging circuit path to the first impedance state or the discharging circuit path to the third impedance state in the first state, and controls the charging circuit path to the second impedance state or the discharging circuit path to the fourth impedance state in the second state.
Abstract:
A gamma-voltage generator is provided to generating a plurality of first gamma voltages and second gamma voltages. At least one of the first gamma voltages generated by DACs of the gamma-voltage generator within a first frame period and at least one of the second gamma voltages generated by the DACs within a second frame period are outputted from a same one of the gamma buffers of the gamma-voltage generator, whereby the transmitted gamma voltages have substantially equal offset. Therefore, the display quality approaches an ideal condition.
Abstract:
A driving device of a liquid crystal display (LCD) utilized for preventing noises of a clock signal from causing error operation of a shift register is disclosed. The driving device includes a shift register, a reception terminal, a noise elimination circuit and a control signal generation circuit. The reception terminal is utilized for receiving a first clock signal. The noise elimination circuit is coupled to the reception terminal, and is utilized for eliminating noises of the first clock signal and delaying the first clock signal for a preset time to generate a second clock signal. The control signal generation circuit is coupled to the reception terminal, the noise elimination circuit and the shift register, and is utilized for generating a first control signal and a second control signal to control the shift register.
Abstract:
A power-saving driving circuit for a flat panel display is provided. The power-saving driving circuit includes a pixel array and at least one source driver. The pixel array composes as a plurality of data lines. The data lines are grouped into a plurality of pixel regions according to a scan time. Each of the pixel regions has a plurality of pixels. The source driver sequentially supplies a driving voltage to the pixels on at least one of the data lines. The driving voltage supplied by the source driver to each of the pixel regions has a varying driving capability, and the driving capability gets stronger as it gets closer to an end of the data lines.
Abstract:
A source driver utilized for a display device and switching between two operational modes includes a reception module for receiving a plurality of display information and a plurality of transmission channels. Each transmission channel includes a register module for receiving one of the plurality of display information; a voltage level transformer for determining a voltage level of the one of display information; a polarization digital-to-analog converter for processing a digital-to-analog operation for the voltage level of the one display information; and an output module for outputting a plurality of voltage levels of the display information. The voltage levels of every two adjacent transmission channels include different polarization of voltage levels, and the output module processes an odd-number switching operation before outputting the plurality of voltage levels.
Abstract:
A source driver utilized for a display device and switching between two operational modes includes a reception module for receiving a plurality of display information and a plurality of transmission channels. Each transmission channel includes a register module for receiving one of the plurality of display information; a voltage level transformer for determining a voltage level of the one of display information; a polarization digital-to-analog converter for processing a digital-to-analog operation for the voltage level of the one display information; and an output module for outputting a plurality of voltage levels of the display information. The voltage levels of every two adjacent transmission channels include different polarization of voltage levels, and the output module processes an odd-number switching operation before outputting the plurality of voltage levels.
Abstract:
A driving circuit of flat display including a charging circuit path, a discharging circuit path, and a detecting circuit is provided. The charging circuit path has first and second impedance states, wherein an impedance value of the first impedance state is smaller than that of the second impedance state. The discharging circuit path has third and fourth impedance states, wherein an impedance value of the third impedance state is smaller than that of the fourth impedance state. The detecting circuit detects whether the charging circuit path or the discharging circuit path is in an unstable first state or stable second state, controls the charging circuit path to the first impedance state or the discharging circuit path to the third impedance state in the first state, and controls the charging circuit path to the second impedance state or the discharging circuit path to the fourth impedance state in the second state.
Abstract:
A driving device of a liquid crystal display (LCD) utilized for preventing noises of a clock signal from causing error operation of a shift register is disclosed. The driving device includes a shift register, a reception terminal, a noise elimination circuit and a control signal generation circuit. The reception terminal is utilized for receiving a first clock signal. The noise elimination circuit is coupled to the reception terminal, and is utilized for eliminating noises of the first clock signal and delaying the first clock signal for a preset time to generate a second clock signal. The control signal generation circuit is coupled to the reception terminal, the noise elimination circuit and the shift register, and is utilized for generating a first control signal and a second control signal to control the shift register.