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公开(公告)号:US11899336B2
公开(公告)日:2024-02-13
申请号:US17604986
申请日:2020-04-17
Applicant: OSAKA UNIVERSITY
Inventor: Giichi Shibuya , Sunri Lee , Hiroyuki Yoshida , Masanori Ozaki
Abstract: A liquid crystal element is provided that can inhibit occurrence of voltage drop between one end and the other end of each electrode. A liquid crystal element (100) includes a liquid crystal layer LQ, a plurality of first arcuate electrodes (1), and a plurality of second arcuate electrodes (2). The first arcuate electrodes (1) are disposed concentrically about an optical axis (AX) of the liquid crystal element (100) and applies first voltage (V1) to the liquid crystal layer (LQ). The second arcuate electrodes (2) are disposed concentrically about the optical axis (AX) and applies second voltage (V2) to the liquid crystal layer (LQ).
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公开(公告)号:US12204227B2
公开(公告)日:2025-01-21
申请号:US18396569
申请日:2023-12-26
Applicant: OSAKA UNIVERSITY
Inventor: Giichi Shibuya , Sunri Lee , Hiroyuki Yoshida , Masanori Ozaki
Abstract: A liquid crystal element is provided that can inhibit occurrence of voltage drop between one end and the other end of each electrode. A liquid crystal element (100) includes a liquid crystal layer LQ, a plurality of first arcuate electrodes (1), and a plurality of second arcuate electrodes (2). The first arcuate electrodes (1) are disposed concentrically about an optical axis (AX) of the liquid crystal element (100) and applies first voltage (V1) to the liquid crystal layer (LQ). The second arcuate electrodes (2) are disposed concentrically about the optical axis (AX) and applies second voltage (V2) to the liquid crystal layer (LQ).
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公开(公告)号:US11860484B2
公开(公告)日:2024-01-02
申请号:US17620349
申请日:2019-06-18
Applicant: OSAKA UNIVERSITY
Inventor: Sunri Lee , Giichi Shibuya , Hiroyuki Yoshida , Masanori Ozaki
IPC: G02F1/1339 , G02F1/1337 , G02F1/1343 , G02F1/29
CPC classification number: G02F1/13394 , G02F1/1337 , G02F1/13398 , G02F1/134381 , G02F1/294
Abstract: A liquid crystal element (100) includes a plurality of unit electrodes (10), a liquid crystal layer (LQ), and a plurality of wall members (WL). Each of the unit electrodes (10) includes a first electrode (1) and a second electrode (2). A voltage is applied to the liquid crystal layer (LQ) from each of the unit electrodes (10). The wall members (WL) are arranged in the liquid crystal layer (LQ). The liquid crystal layer (LQ) has a waveform retardation (RT). Two or more of a plurality of peaks (P1) in the retardation (RT) correspond to positions of respective wall members (WL).
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