公开(公告)号：US20250093931A1

公开(公告)日：2025-03-20

申请号：US18468242

申请日：2023-09-15

Applicant: QUALCOMM Incorporated

Inventor： Mahadevamurty Nemani ,  Anubhav Mishra ,  Arun Sukheja ,  Nitin Makhija ,  Adarsh Baraka Ravi

IPC: G06F1/28 ,  G06F9/445

Abstract: Autonomously managing core cluster frequencies using performance statistics in processor devices is disclosed herein. In some aspects, a cluster power management circuit of a processor device collects Activity Management Unit (AMU) statistics for multiple processor cores for each of one or more frequency operating points over a time interval. Based on the AMU statistics, the cluster power management circuit generates a performance model representing processor performance as a function of frequency, and uses the performance model and a power consumption measurement to generate an energy-per-instruction (EI) model representing energy per instruction as a function of frequency. The cluster power management circuit then generates an advantage model based on a first rate of change of the performance model as a function of frequency and a second rate of change of the EI model as a function of frequency, and identifies a target frequency operating point based on the advantage model.