CONTROL OF ERROR CORRECTION DECODER OPERATION AND USAGE IN A RECEIVER DEVICE

    公开(公告)号:US20230318741A1

    公开(公告)日:2023-10-05

    申请号:US17657115

    申请日:2022-03-29

    CPC classification number: H04L1/0061 H04L1/0068

    Abstract: An apparatus for wireless communication is provided. The apparatus may be a receiver device that includes an error correction decoder, such as a low-density parity check (LDPC) decoder. The apparatus may achieve power savings and/or operation cycle savings by disabling the error correction decoder in scenarios where bits of a codeword in a signal transmission are received without errors. The apparatus obtains a first set of bits of a codeword, wherein the codeword includes the first set of bits and a second set of bits, and wherein the second set of bits is punctured. The apparatus recovers the second set of bits based on at least the first set of bits and determines whether to operate an error correction decoder based on a result of an error detection operation performed on the codeword using the first set of bits and the second set of bits.

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