公开(公告)号：US20240386980A1

公开(公告)日：2024-11-21

申请号：US18522098

申请日：2023-11-28

Applicant: QUALCOMM Incorporated

Inventor： Simon Peter William BOOTH ,  Subbarao PALACHARLA ,  George PATSILARAS ,  Hiral NANDU ,  Girish BHAT ,  Yen-Kuan WU

IPC: G11C29/12

Abstract: Aspects presented herein relate to methods and devices for data or graphics processing including an apparatus, e.g., a graphics processing unit (GPU). The apparatus may obtain an indication of a data write for data associated with data processing. The apparatus may write, based on the indication, the data associated with the data processing to a memory address. The apparatus may receive a read request for the data including the memory address, where the read request is associated with a read with invalidate process. The apparatus may retrieve, based on the read request, the data from at least one of a first cache or at least one second memory, where the retrieval of the data is based on a timing of the indication of the data write. The apparatus may output the retrieved data from at least one of the first cache or the at least one second memory.

公开(公告)号：US20240370376A1

公开(公告)日：2024-11-07

申请号：US18522049

申请日：2023-11-28

Applicant: QUALCOMM Incorporated

Inventor： Subbarao PALACHARLA ,  Hiral NANDU ,  George PATSILARAS ,  Simon Peter William BOOTH ,  Rakesh Kumar GUPTA ,  Kedar BHOLE

IPC: G06F12/0888

Abstract: Aspects presented herein relate to methods and devices for data or graphics processing including an apparatus, e.g., a graphics processing unit (GPU). The apparatus may configure an address range in a cache. The apparatus may also obtain a request to access data in the cache, where the request to access the data includes an address in the cache that maps to a set index in a plurality of set indexes, where an address value for the set index corresponds to a portion of the address. Further, the apparatus may select an updated address value for the set index, where the updated address value is associated with an updated address within the address range, and the updated address value corresponds to a portion of the updated address. The apparatus may also allocate the data in the request to the updated address value for the set index.

公开(公告)号：US20230214330A1

公开(公告)日：2023-07-06

申请号：US17646690

申请日：2021-12-31

Applicant: QUALCOMM Incorporated

Inventor： Hiral NANDU ,  Subbarao PALACHARLA ,  George PATSILARAS ,  Alain ARTIERI ,  Simon Peter William BOOTH ,  Vipul GANDHI ,  Girish BHAT ,  Yen-Kuan WU ,  Younghoon KIM

IPC: G06F12/123 ,  G06F9/30

CPC classification number: G06F12/123 ,  G06F9/30101

Abstract: Various embodiments include methods and devices for implementing a criterion aware cache replacement policy by a computing device. Embodiments may include updating a staling counter, writing a value of a local counter to a system cache in association with a location in the system cache for with data, in which the value of the local counter includes a value of the staling counter when (i.e., at the time) the associated data is written to the system cache, and using the value of the local counter of the associated data to determine whether the associated data is stale.