公开(公告)号：US09652713B2

公开(公告)日：2017-05-16

申请号：US15090487

申请日：2016-04-04

Applicant: QUALCOMM TECHNOLOGIES INC.

Inventor： Jonathan James Hunt ,  Oleg Sinyavskiy ,  Robert Howard Kimball ,  Eric Martin Hall ,  Jeffrey Alexander Levin ,  Paul Bender ,  Michael-David Nakayoshi Canoy

IPC: G06F15/18 ,  G06N3/00 ,  G06N3/10 ,  G06N3/04

CPC classification number: G06N3/105 ,  G06N3/049

Abstract: Apparatus and methods for developing parallel networks. Parallel network design may comprise a general purpose language (GPC) code portion and a network description (ND) portion. GPL tools may be utilized in designing the network. The GPL tools may be configured to produce network specification language (NSL) engine adapted to generate hardware optimized machine executable code corresponding to the network description. The developer may be enabled to describe a parameter of the network. The GPC portion may be automatically updated consistent with the network parameter value. The GPC byte code may be introspected by the NSL engine to provide the underlying source code that may be automatically reinterpreted to produce the hardware optimized machine code. The optimized machine code may be executed in parallel.

公开(公告)号：US09311596B2

公开(公告)日：2016-04-12

申请号：US14198550

申请日：2014-03-05

Applicant: QUALCOMM TECHNOLOGIES INC.

Inventor： Eugene M. Izhikevich ,  Botond Szatmary ,  Csaba Petre ,  Filip Piekniewski ,  Michael-David Nakayoshi Canoy ,  Robert Howard Kimball ,  Jan Krzys Wegrzyn

IPC: G06N3/04 ,  G06N3/02 ,  G06N3/10

CPC classification number: G06N3/10 ,  G06N3/04 ,  G06N3/049

Abstract: A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Methods for managing memory in a processing system are described whereby memory can be allocated among a plurality of elements and rules configured for each element such that the parallel execution of the spiking networks is most optimal.

Abstract translation: 公开了一种简单的格式，并被称为基本网络描述（END）。 该格式可以充分描述大规模神经元模型和软件或硬件引擎的实施例，以有效地模拟这种模型。 这种神经形态发动机的架构对于具有尖峰时间依赖可塑性的加标网络的高性能并行处理是最佳的。 描述了用于管理处理系统中的存储器的方法，其中可以在为每个元件配置的多个元件和规则之间分配存储器，使得加标网络的并行执行是最佳的。