公开(公告)号：US11749398B2

公开(公告)日：2023-09-05

申请号：US16933163

申请日：2020-07-20

Applicant: Quanta Computer Inc.

Inventor： Kuei-Hong Kuo ,  Hao Wang ,  Chung-Yi Yang ,  Kuan-Chieh Huang ,  Bo-Yu Lin ,  Yi-Ting Peng ,  Ching-Chung Kao

IPC: G06K9/00 ,  G16H30/20 ,  G16H50/20 ,  G16H50/30 ,  G16H10/60 ,  G16H15/00 ,  G06N3/02 ,  G06F18/24 ,  G06V10/764 ,  G06V10/80 ,  G06V10/82

CPC classification number: G16H30/20 ,  G06F18/24 ,  G06N3/02 ,  G06V10/764 ,  G06V10/809 ,  G06V10/82 ,  G16H10/60 ,  G16H15/00 ,  G16H50/20 ,  G16H50/30

Abstract: The medical image recognition method includes the following steps: transmitting an accession number to a recognition module through a prediction unit; receiving an accession number and a human body image by a recognition model, and importing the human body image into a set of neural network models respectively; wherein each of the neural network models outputs at least one recognition result; the recognition module returns the recognition results to the prediction unit, and then the recognition results are stored in database.

公开(公告)号：US12014813B2

公开(公告)日：2024-06-18

申请号：US17361718

申请日：2021-06-29

Applicant: Quanta Computer Inc.

Inventor： Kuei-Hong Kuo ,  Yi-Ting Peng ,  Ching-Chung Kao ,  Ai-Ling Hsu ,  Yu-Ren Yang ,  Pei-Wei Shueng ,  Chun-You Chen ,  Kuan-Chieh Huang

IPC: G16H30/20 ,  G06T7/00 ,  G16H30/40

CPC classification number: G16H30/20 ,  G06T7/0012 ,  G16H30/40 ,  G06T2207/10081 ,  G06T2207/20084

Abstract: Systems with a contouring method are provided for contouring one or more targets that correspond to specific organs and/or tumors in a three-dimensional medical image of a patient using neural networks. The contouring system includes a storage unit, a processing unit, and a plurality of modules that are computer operable. The processing unit is used to obtain the image, and then to generate one or more contouring images using a contouring method. The contouring method includes enhancing image features and improving contouring accuracy using an image preprocessing module, and extracting a plurality of multi-scale image representations and expanding these representations to one or more contouring images using a neural network-based contouring module.

公开(公告)号：US11779295B2

公开(公告)日：2023-10-10

申请号：US17223605

申请日：2021-04-06

Applicant: Quanta Computer Inc. ,  Taipei Medical University

Inventor： Wing P. Chan ,  Ai-Ling Hsu ,  Kuan-Chieh Huang ,  Yi-Ting Peng ,  Ching-Chung Kao

IPC: A61B6/00 ,  G06T7/00 ,  A61B6/03

CPC classification number: A61B6/5223 ,  A61B6/03 ,  A61B6/468 ,  A61B6/505 ,  A61B6/5229 ,  G06T7/0012 ,  G06T2207/10028 ,  G06T2207/20081 ,  G06T2207/20084 ,  G06T2207/30012

Abstract: The present invention discloses a method and a system of vertebral compression fracture detection. The method of vertebral compression fracture detection includes: recombining a plurality of anatomical images captured in at least a spine segment of a target individual into a 3D image; using a multi-planar reconstruction method to reformat the 3D image to obtain at least one sagittal reformatted image; using a classification model to determine whether the sagittal reformatted image covers the middle section of the vertebral column or not; using a vertebral detection method to detect each vertebral body in the sagittal reformatted image covering the middle section of the vertebral column; using a keypoint localization method to localize a plurality of keypoints of each vertebral body which was detected in the sagittal reformatted image; evaluating the compression fracture grade of each vertebral body in the sagittal reformatted image.

公开(公告)号：US11568232B2

公开(公告)日：2023-01-31

申请号：US15891762

申请日：2018-02-08

Applicant: QUANTA COMPUTER INC.

Inventor： Kuan-Chieh Huang ,  Yi-Ting Peng

IPC: G06F9/44 ,  G06N3/08 ,  G06N3/04 ,  G06N3/10 ,  G06F30/34 ,  G06F9/50 ,  H03K19/177

Abstract: Systems and methods for programming field programmable gate array (FPGA) devices are provided. A trained model for a deep learning process is obtained and converted to design abstraction (DA) code defining logic block circuits for programming an FPGA device. Each of these logic block circuits represents one of a plurality of modules that executes a processing step between different layers of the deep learning process.