公开(公告)号：US20240130138A1

公开(公告)日：2024-04-18

申请号：US18483907

申请日：2023-10-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yukio HAYAKAWA ,  Yong Seok KIM ,  Bong Yong LEE ,  Si Yeon CHO

IPC: H10B51/30 ,  H10B51/20 ,  H10B51/40

CPC classification number: H10B51/30 ,  H10B51/20 ,  H10B51/40

Abstract: A semiconductor memory device includes a cell substrate, a plurality of gate electrodes sequentially stacked on the cell substrate and extending in a first direction, first and second channel structures extending in a second direction different from the first direction and penetrating the plurality of gate electrodes, and a bit line disposed on the plurality of gate electrodes. The first and second channel structures each include a ferroelectric layer, a channel layer, a gate insulating layer and a back gate electrode, which are sequentially disposed on side walls of the plurality of gate electrodes. The first channel structure and the second channel structure are adjacent to each other in the first direction and share a bit line.

公开(公告)号：US20240040795A1

公开(公告)日：2024-02-01

申请号：US18351407

申请日：2023-07-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bong Yong LEE ,  Yong Seok Kim

IPC: H10B51/20 ,  H10B51/10 ,  H01L29/66 ,  H01L29/78 ,  H01L23/528

CPC classification number: H10B51/20 ,  H10B51/10 ,  H01L29/6684 ,  H01L29/78391 ,  H01L23/5283

Abstract: A semiconductor device comprises a substrate that extends in first and second directions and includes a cell region and an extension region that extends from the cell region in the first direction, first and second insulating layers alternately stacked on the substrate in a third direction, a conductive line disposed on one sidewall of the second insulating layer in the second direction, a conductive pillar that extends in the third direction and penetrates through the first insulating layer, a semiconductor layer disposed on one sidewall of the conductive pillar and that extends in the third direction, and a ferroelectric layer disposed between the conductive line and the semiconductor layer and that extends in the third direction. The conductive line includes first and second conductive patterns spaced apart from each other in the second direction, and the second insulating layer is disposed between the first and second conductive patterns.

公开(公告)号：US20220165752A1

公开(公告)日：2022-05-26

申请号：US17669830

申请日：2022-02-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bong Yong LEE ,  Tae Hun KIM ,  Min Kyung BAE

IPC: H01L27/11582 ,  H01L27/11573 ,  H01L27/11556 ,  H01L29/06 ,  H01L23/10 ,  H01L27/11526

Abstract: A semiconductor device including a substrate; a lower structure including a sealing layer on the substrate and a support layer on the sealing layer, the sealing layer and the support layer both including a semiconductor material; a mold structure on the lower structure and having an interlayer insulating film and a conductive film alternately stacked therein; a channel hole penetrating the mold structure; a channel structure extending along sidewalls of the channel hole; an isolation trench penetrating the mold structure and extending into the lower structure; and a poly liner extending along sidewalls of the isolation trench, the poly liner being connected to the lower structure and including the semiconductor material.