公开(公告)号：US20180005943A1

公开(公告)日：2018-01-04

申请号：US15704049

申请日：2017-09-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changseop YOON ,  Kwangsub YOON ,  Jongmil YOUN ,  Hyung Jong LEE

IPC: H01L23/528 ,  H01L27/02 ,  H01L23/485 ,  H01L29/06 ,  H01L21/8238

CPC classification number: H01L23/5283 ,  H01L21/823871 ,  H01L23/485 ,  H01L27/0207 ,  H01L29/0653

Abstract: A semiconductor device includes a substrate including PMOSFET and NMOSFET regions, a first gate structure extending in a first direction and crossing the PMOSFET and NMOSFET regions, and a gate contact on and connected to the first gate structure, the gate contact being between the PMOSFET and NMOSFET regions, the gate contact including a first sub contact in contact with a top surface of the first gate structure, the first sub contact including a vertical extending portion extending vertically toward the substrate along one sidewall of the first gate structure, and a second sub contact spaced apart from the first gate structure, a top surface of the second sub contact being positioned at a same level as a top surface of the first sub contact.

公开(公告)号：US20200346143A1

公开(公告)日：2020-11-05

申请号：US16567052

申请日：2019-09-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taehoi PARK ,  Sangjin KIM ,  Nakhee SEONG ,  Woojeong SHIN ,  Taehwan OH ,  Kwangsub YOON

IPC: B01D35/26 ,  G03F7/16 ,  B01D36/00

Abstract: A resist coating apparatus including a resist supplying system; a resist filtering system having a first filter, a second filter, and a pump between the first filter and the second filter; and a resist dispensing system, wherein the first filter includes a plurality of first unit filters connected in parallel.

公开(公告)号：US20190027438A1

公开(公告)日：2019-01-24

申请号：US16119475

申请日：2018-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changseop YOON ,  Kwangsub YOON ,  Jongmil YOUN ,  Hyung Jong LEE

IPC: H01L23/528 ,  H01L27/02 ,  H01L23/485 ,  H01L29/06 ,  H01L21/8238

Abstract: A semiconductor device includes a substrate including PMOSFET and NMOSFET regions, a first gate structure extending in a first direction and crossing the PMOSFET and NMOSFET regions, and a gate contact on and connected to the first gate structure, the gate contact being between the PMOSFET and NMOSFET regions, the gate contact including a first sub contact in contact with a top surface of the first gate structure, the first sub contact including a vertical extending portion extending vertically toward the substrate along one sidewall of the first gate structure, and a second sub contact spaced apart from the first gate structure, a top surface of the second sub contact being positioned at a same level as a top surface of the first sub contact.