公开(公告)号：US09747246B2

公开(公告)日：2017-08-29

申请号：US14625196

申请日：2015-02-18

Applicant: STMICROELECTRONICS, INC.

Inventor： Brian Deng

IPC: H05K7/10 ,  G06F13/42 ,  G06F13/362

CPC classification number: G06F13/4282 ,  G06F13/362 ,  Y02D10/14 ,  Y02D10/151

Abstract: An electronic device may include system and serial peripheral interface (SPI) clocks, and a host interface each switchable between active and inactive states, a serial controller coupled to the system clock, and a memory. A slave controller may generate a request active signal based upon a transaction request from a host and causing each of the system clock, SPI clock, and host interface into the active state, store request data in the memory, and switch the host interface to the inactive state based upon the request data being stored. The serial controller may process the request based upon the request active signal, and generate a request complete signal based upon the request being processed. The slave controller may switch the system clock to the inactive state based upon the request complete signal. The SPI clock may be switched to the inactive state based upon the request complete signal.