Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process
    1.
    发明申请
    Vertical bipolar transistor including an extrinsic base with reduced roughness, and fabrication process 有权
    包括具有减小的粗糙度的外在基极的垂直双极晶体管和制造工艺

    公开(公告)号:US20020003286A1

    公开(公告)日:2002-01-10

    申请号:US09930084

    申请日:2001-08-15

    CPC classification number: H01L29/66242 H01L29/0826 H01L29/1004 H01L29/7378

    Abstract: The vertical bipolar transistor includes an SiGe heterojunction base formed by a stack of layers of silicon and silicon-germanium resting on an initial layer of silicon nitride extending over a side insulation region surrounding the upper part of the intrinsic collector. The stack of layers also extends on the surface of the intrinsic collector which lies inside a window formed in the initial layer of silicon nitride.

    Abstract translation: 垂直双极晶体管包括SiGe异质结基底,其由沉积在围绕本征收集器的上部的侧绝缘区域延伸的氮化硅初始层上的硅层和硅锗叠层形成。 层叠层还在固有收集器的位于形成于初始氮化硅层的窗口内部的表面上延伸。

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