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公开(公告)号:US20150137874A1
公开(公告)日:2015-05-21
申请号:US14547684
申请日:2014-11-19
Applicant: STMICROELECTRONICS SA , UNIVERSITY OF TWENTE
Inventor: Andreia CATHELIN , Bram Nauta
CPC classification number: H03K3/012 , H01L21/84 , H01L27/1203 , H01L29/78603 , H01L29/78648
Abstract: A Silicon On Insulator current source array includes input control for receiving a control voltage, a first reference input for receiving a first reference voltage, and a second reference input for receiving a second reference voltage. A chain of several Silicon On Insulator MOS transistors, of the same type, have control electrodes all connected to the input control, first conduction electrodes are all connected to the first reference input, and second conduction electrodes are respectively connected to the second reference input through several load circuits respectively configured to be traversed by several currents when the several transistors are ON upon application of the control voltage on the input control. An input bias is coupled to a semiconductor well located below an insulating buried layer located below the chain of transistors for receiving a biasing voltage difference.
Abstract translation: 硅绝缘体电流源阵列包括用于接收控制电压的输入控制,用于接收第一参考电压的第一参考输入和用于接收第二参考电压的第二参考输入。 具有相同类型的多个绝缘体硅MOS晶体管的链条具有全部连接到输入控制的控制电极,第一导电电极全部连接到第一参考输入,第二导电电极分别连接到第二参考输入 当在输入控制上施加控制电压时,当几个晶体管导通时,多个负载电路分别被配置为被几个电流穿过。 输入偏置耦合到位于晶体管链下方的绝缘掩埋层下方的半导体阱,用于接收偏置电压差。
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公开(公告)号:US09455689B2
公开(公告)日:2016-09-27
申请号:US14547684
申请日:2014-11-19
Applicant: STMICROELECTRONICS SA , UNIVERSITY OF TWENTE
Inventor: Andreia Cathelin , Bram Nauta
IPC: H01L21/8238 , H01L29/66 , H03K3/012 , H01L21/84 , H01L29/786 , H01L27/12
CPC classification number: H03K3/012 , H01L21/84 , H01L27/1203 , H01L29/78603 , H01L29/78648
Abstract: A Silicon On Insulator current source array includes input control for receiving a control voltage, a first reference input for receiving a first reference voltage, and a second reference input for receiving a second reference voltage. A chain of several Silicon On Insulator MOS transistors, of the same type, have control electrodes all connected to the input control, first conduction electrodes are all connected to the first reference input, and second conduction electrodes are respectively connected to the second reference input through several load circuits respectively configured to be traversed by several currents when the several transistors are ON upon application of the control voltage on the input control. An input bias is coupled to a semiconductor well located below an insulating buried layer located below the chain of transistors for receiving a biasing voltage difference.
Abstract translation: 硅绝缘体电流源阵列包括用于接收控制电压的输入控制,用于接收第一参考电压的第一参考输入和用于接收第二参考电压的第二参考输入。 具有相同类型的多个绝缘体硅MOS晶体管的链条具有全部连接到输入控制的控制电极,第一导电电极全部连接到第一参考输入,第二导电电极分别连接到第二参考输入 当在输入控制上施加控制电压时,当几个晶体管导通时,多个负载电路分别被配置为被几个电流穿过。 输入偏置耦合到位于晶体管链下方的绝缘掩埋层下方的半导体阱,用于接收偏置电压差。
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