Pseudo bidimensional randomly accessible memory
    1.
    发明申请
    Pseudo bidimensional randomly accessible memory 有权
    伪二维随机访问记忆

    公开(公告)号:US20040115879A1

    公开(公告)日:2004-06-17

    申请号:US10662225

    申请日:2003-09-12

    CPC classification number: G11C7/18 G11C19/00 G11C19/28 G11C19/287

    Abstract: A memory comprises at least one array of memory elements, a partition of the at least one array into a plurality of sub-arrays of the memory elements, and an array configuration circuit for selectively putting the at least one array in one of two operating configurations. In a first operating configuration, the memory elements of the at least one array are coupled one to another to form a monodimensional sequentially-accessible memory, while in a second operating configuration the memory elements in each sub-array are coupled to one another so as to form an independent monodimensional sequentially-accessible memory block, a data content of any memory element of the sub-array being rotatable by shifts through the memory elements of the sub-array. A sub-array selector, responsive to a first memory address, selects one among the at least two sub-arrays according to the first memory address, and enables access to the selected sub-array. A memory element access circuit, responsive to a second memory address, enables access to a prescribed memory element in the selected sub-array after a prescribed number of shifts of the data content of the memory elements in the selected sub-array depending on the second memory address.

    Abstract translation: 存储器包括存储器元件的至少一个阵列,至少一个阵列的划分成存储器元件的多个子阵列,以及阵列配置电路,用于选择性地将至少一个阵列放置在两种操作配置之一中 。 在第一操作配置中,所述至少一个阵列的存储器元件彼此耦合以形成一维顺序可访问的存储器,而在第二操作配置中,每个子阵列中的存储器元件彼此耦合,以便 为了形成独立的单维顺序可访问的存储块,子阵列的任何存储元件的数据内容可以通过移位通过子阵列的存储元件来旋转。 响应于第一存储器地址的子阵列选择器根据第一存储器地址在所述至少两个子阵列中选择一个,并使能够访问所选择的子阵列。 存储器元件访问电路响应于第二存储器地址,使得能够在所选择的子阵列中的存储元件的数据内容的规定数量的移位之后,根据第二存储器地址访问所选择的子阵列中的规定的存储器元件 内存地址。

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