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公开(公告)号：US11860993B2
公开(公告)日：2024-01-02
申请号：US17396137
申请日：2021-08-06
Applicant: STMicroelectronics International N.V.
Inventor： Dhulipalla Phaneendra Kumar
Abstract: A method of operating an electronic device includes generating scramble control codes. The scramble codes are generated by generating a random number, shifting the random number to produce a shifted random number, generating control signals by selecting different subsets of the shifted random number, and generating scramble control words by selecting different subsets of the random number based upon the control signals. The method further includes receiving a password comprised of sub-words and scrambling those sub-words according to the scramble control codes, retrieving a verification word comprised of sub-words and scrambling those sub-words according to the scramble control codes, and comparing the scrambled sub-words of the password to the scrambled sub-words of the verification word to thereby authenticate an external device that provided the password.
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公开(公告)号：US20230168699A1
公开(公告)日：2023-06-01
申请号：US17967498
申请日：2022-10-17
Applicant: STMicroelectronics International N.V.
Inventor： Venkata Narayanan Srinivasan , Mayankkumar Hareshbhai Niranjani , Dhulipalla Phaneendra Kumar , Gourav Garg , Sourabh Banzal
Abstract: An electric device includes: a first power domain; a second power domain; a third power domain, where during power-up, the third, the second, and the first power domains are configured to be powered up sequentially, where during standby-exit, the first, the second, and the third power domains are configured to be powered up sequentially; isolation paths that provide controlled signal transmission among the first, the second, and the third power domains, where each isolation path includes an isolation circuit between an input power domain and an output power domain of the isolation path; and a control circuit in the first power domain, where for each isolation path, the control circuit is configured to generate an isolation control signal for the isolation circuit, where the isolation circuit is configured enable or disable signal transmission along the isolation path.
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Patent Agency Ranking
公开(公告)号：US11983025B2
公开(公告)日：2024-05-14
申请号：US17967498
申请日：2022-10-17
Applicant: STMicroelectronics International N.V.
Inventor： Venkata Narayanan Srinivasan , Mayankkumar Hareshbhai Niranjani , Dhulipalla Phaneendra Kumar , Gourav Garg , Sourabh Banzal
Abstract: An electric device includes: a first power domain; a second power domain; a third power domain, where during power-up, the third, the second, and the first power domains are configured to be powered up sequentially, where during standby-exit, the first, the second, and the third power domains are configured to be powered up sequentially; isolation paths that provide controlled signal transmission among the first, the second, and the third power domains, where each isolation path includes an isolation circuit between an input power domain and an output power domain of the isolation path; and a control circuit in the first power domain, where for each isolation path, the control circuit is configured to generate an isolation control signal for the isolation circuit, where the isolation circuit is configured enable or disable signal transmission along the isolation path.
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公开(公告)号：US11281795B2
公开(公告)日：2022-03-22
申请号：US16726498
申请日：2019-12-24
Applicant: STMicroelectronics International N.V.
Inventor： Dhulipalla Phaneendra Kumar
Abstract: A system includes a random number generator generating a random number in response to an event. Control logic generates hierarchical part alignment selectors from the random number. For each secure data block to be stored in volatile storage, a physical address of a first logical address for that secure data block is set based upon the hierarchical part alignment selectors. For each data word within that secure data block, a physical address of a first logical address for that data word is set based upon the hierarchical part alignment selectors. For each data byte within that data word, a physical address of a first logical address for that data byte is set based upon the hierarchical part alignment selectors. A physical address of a logical address for a first data bit within that data byte is set based upon the hierarchical part alignment selectors.
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公开(公告)号：US11513544B1
公开(公告)日：2022-11-29
申请号：US17537010
申请日：2021-11-29
Applicant: STMicroelectronics International N.V.
Inventor： Venkata Narayanan Srinivasan , Mayankkumar Hareshbhai Niranjani , Dhulipalla Phaneendra Kumar , Gourav Garg , Sourabh Banzal
Abstract: An electric device includes: a first power domain; a second power domain; a third power domain, where during power-up, the third, the second, and the first power domains are configured to be powered up sequentially, where during standby-exit, the first, the second, and the third power domains are configured to be powered up sequentially; isolation paths that provide controlled signal transmission among the first, the second, and the third power domains, where each isolation path includes an isolation circuit between an input power domain and an output power domain of the isolation path; and a control circuit in the first power domain, where for each isolation path, the control circuit is configured to generate an isolation control signal for the isolation circuit, where the isolation circuit is configured enable or disable signal transmission along the isolation path.
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公开(公告)号：US11442108B1
公开(公告)日：2022-09-13
申请号：US17477237
申请日：2021-09-16
Applicant: STMicroelectronics International N.V.
IPC: G01R31/3185 , G01R31/317
Abstract: A circuit includes: a first power domain including: an isolation cell, a first selection circuit having inputs for receiving a first functional signal and a first test signal and an output for controlling the isolation cell, and a second selection circuit having inputs for receiving a second functional signal and a second test signal and an output coupled to a signal input of the isolation cell; a second power domain including: a first circuit having an input coupled to a signal output of the isolation cell, a first observation element coupled to the signal output of the isolation cell, and a second observation element coupled to an output of the first circuit; where, when in test mode, the first selection circuit controls the isolation cell based on the first test signal, and the second selection circuit provides the second test signal to the signal input of the isolation cell.
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公开(公告)号：US11227046B2
公开(公告)日：2022-01-18
申请号：US16726454
申请日：2019-12-24
Applicant: STMicroelectronics International N.V.
Inventor： Dhulipalla Phaneendra Kumar
Abstract: Disclosed herein is a method of performing a password challenge in an embedded system. The method includes receiving a password, scrambling the sub-words of the password pursuant to scramble control codes, retrieving a verification word, scrambling the sub-words of the verification word pursuant to the scramble control codes, and comparing the scrambled sub-words of the password to the scrambled sub-words of the verification word. Access to a secure resource is granted if the scrambled sub-words of the password match the scrambled sub-words of the verification word. The scramble control codes cause random reordering of the sub-words of the password and sub-words of the verification word in a same fashion, and insertion of random delays between the comparison of different sub-words of the password to corresponding sub-words of the verification word.
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