公开(公告)号：US20240361791A1

公开(公告)日：2024-10-31

申请号：US18139786

申请日：2023-04-26

Applicant: STMicroelectronics International N.V.

Inventor： Federico MUSARRA ,  Sandor PETENYI

IPC: G05F1/575 ,  G05F1/565 ,  G05F3/24

CPC classification number: G05F1/575 ,  G05F1/565 ,  G05F3/24

Abstract: An electronic device includes multiple integrated circuits, each containing a power transistor connected between an input voltage node and a load node, as well as a regulation circuit generating at least one sense current representing the output current of the power transistor. The regulation circuits modulate the output currents of their power transistors based on a value derived from the sense currents generated by the regulation circuits of other integrated circuits. This derived value can be based on an average of the sense currents generated by the regulation circuits or on one of the sense currents. In particular, the integrated circuits can be arranged in a daisy-chained relationship, allowing each regulation circuit to compare its sense current with the one from the immediately preceding circuit, except for the first regulation circuit, which compares its sense current with the last circuit's sense current in the chain.