公开(公告)号：US20240340202A1

公开(公告)日：2024-10-10

申请号：US18644590

申请日：2024-04-24

Applicant: STMicroelectronics International N.V.

Inventor： Iztok BRATUZ ,  Vinko KUNC ,  Maksimiljan STIGLIC

IPC: H04L25/49

CPC classification number: H04L25/4904

Abstract: Various embodiments of the present disclosure disclose decoding techniques for mitigating data corruption due to duty cycle distortion, jitter, and other distortions to a digital signal. Decoding processes, apparatuses, and systems are provided that utilize a decoding framework for improving the accuracy of output bit streams generated from digital signals. An example process receives data indicative of a digital signal, generates a signal measurement for the digital signal that includes signal length descriptive between a two rising edges of a digital signal or two falling edges of the demodulated digital signal, and generates at least one portion of an output bit stream for the digital signal based at least in part on the signal measurement.

公开(公告)号：US20240179036A1

公开(公告)日：2024-05-30

申请号：US18059103

申请日：2022-11-28

Applicant: STMicroelectronics International N.V.

Inventor： Iztok BRATUZ ,  Vinko KUNC ,  Maksimiljan STIGLIC

IPC: H04L25/49

CPC classification number: H04L25/4904

Abstract: Various embodiments of the present disclosure disclose decoding techniques for mitigating data corruption due to duty cycle distortion, jitter, and other distortions to a digital signal. Decoding processes, apparatuses, and systems are provided that utilize a decoding framework for improving the accuracy of output bit streams generated from digital signals. An example process receives data indicative of a digital signal, generates a signal measurement for the digital signal that includes signal length descriptive between a two rising edges of a digital signal or two falling edges of the demodulated digital signal, and generates at least one portion of an output bit stream for the digital signal based at least in part on the signal measurement.