GLITCH IMMUNE CASCADED INTEGRATOR COMB ARCHITECTURE FOR HIGHER ORDER SIGNAL INTERPOLATION

    公开(公告)号:US20190158070A1

    公开(公告)日:2019-05-23

    申请号:US15815989

    申请日:2017-11-17

    Abstract: A digital filtering method includes receiving a digital signal, and passing the digital signal through a Pth order comb cascade. The method includes beginning pre-computing of intermediate integrator states of a Pth order integrator cascade as a function of the digital signal, prior to receiving output from a last comb of the Pth order comb cascade. The outputs from each comb of the Pth order comb cascade are then applied to the pre-computed intermediate integrator states to thereby produce a filtered version of the digital signal. The Pth order comb cascade may operate at a sampling frequency, and the pre-computing of the intermediate integrator states is performed at the sampling frequency, while the application of the outputs from each comb of the Pth order comb cascade to the pre-computed intermediate integrator states is performed at a multiple of the sampling frequency.

    Self-calibrated digital-to-analog converter
    2.
    发明授权
    Self-calibrated digital-to-analog converter 有权
    自校准数模转换器

    公开(公告)号:US09379728B1

    公开(公告)日:2016-06-28

    申请号:US14751456

    申请日:2015-06-26

    CPC classification number: H03M1/1023 H03M1/1047 H03M1/66

    Abstract: A digital-to-analog converter has an output. An analog-to-digital converter senses a voltage at the output of the digital-to-analog converter and generates a digital voltage signal. A source mismatch estimator processes the digital voltage signal to output an error signal indicative of current source mismatch within the digital-to-analog converter. An error code generator generates a digital calibration signal from the error signal. The digital calibration signal is converted by a redundancy digital-to-analog converter to an analog compensation signal for application to the output of analog-to-digital converter to nullify effects of the current source mismatch.

    Abstract translation: 一个数模转换器有一个输出。 模拟 - 数字转换器感测数模转换器输出端的电压,并产生一个数字电压信号。 源不匹配估计器处理数字电压信号以输出指示数模转换器内的电流源失配的误差信号。 错误代码发生器从误差信号产生数字校准信号。 数字校准信号由冗余数模转换器转换为模拟补偿信号,以应用于模数转换器的输出,以消除电流源不匹配的影响。

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