公开(公告)号：US20040155703A1

公开(公告)日：2004-08-12

申请号：US10765767

申请日：2004-01-26

Applicant: STMicroelectronics S.A.

Inventor： Jean Ravatin ,  Francois Van Zanten

IPC: H03F001/02

CPC classification number: H03H19/004 ,  H03F1/304

Abstract: A circuit for correcting the offset of an amplification and filtering chain having a predetermined gain and cut-off frequency depending on the value of at least one capacitor, comprising: a correction means for subtracting from the chain input a correction signal depending on the value of a programmable digital word; a digital automaton for, in a setting phase, searching, then memorizing one of two consecutive values of the digital word between which the output signal of the chain switches sign, the input signal being canceled during a setting phase; and comprising a means for, during the setting phase, reducing the value of said at least one capacitor with respect to its normal operating value.

Abstract translation: 一种用于根据至少一个电容器的值校正具有预定增益和截止频率的放大和滤波链的偏移的电路，包括：校正装置，用于从链输入中减去校正信号，该校正信号取决于 可编程数字字; 一个数字自动机，用于在设定阶段中搜索，然后存储所述数字字的两个连续值中的一个，所述数字字的输出信号在所述数字字的两个连续值之间，所述输入信号在设定阶段被取消; 并且包括用于在设定阶段期间相对于其正常工作值减小所述至少一个电容器的值的装置。