公开(公告)号：US20040156235A1

公开(公告)日：2004-08-12

申请号：US10719650

申请日：2003-11-21

Applicant: STMicroelectronics S.r.I.

Inventor： Andrea Bellini ,  Mauro Sali ,  Alessandro Magnavacca ,  Carlo Lisi

IPC: G11C011/34

CPC classification number: G11C16/26 ,  G11C16/344 ,  G11C2216/22

Abstract: A nonvolatile memory device with simultaneous read/write has a memory array formed by a plurality of cells organized into memory banks, and a plurality of first and second sense amplifiers. The device further has a plurality of R/W selectors associated to respective sets of cells and connecting the cells of the respective sets of cells alternately to the first sense amplifiers and to the second sense amplifiers.

Abstract translation: 具有同时读/写的非易失性存储器件具有由组织到存储体中的多个单元形成的存储器阵列以及多个第一和第二读出放大器。 该装置还具有与相应的单元组相关联的多个R / W选择器，并将各组单元的单元交替地连接到第一读出放大器和第二读出放大器。