Power down protocol for integrated circuits
    1.
    发明申请
    Power down protocol for integrated circuits 有权
    集成电路的掉电协议

    公开(公告)号:US20020152407A1

    公开(公告)日:2002-10-17

    申请号:US10010738

    申请日:2001-11-05

    Abstract: A system-on-chip (SOC) includes a power down circuit. Within the SOC are several circuit blocks, each of them operating responsive to a local clock signal. A system clock is coupled to the circuit blocks for providing a system clock signal that functions as the local clock signal for selected circuit blocks. A power control manager provides a signal that at least partially determines whether the system clock will act as the local clock for some of the circuit blocks. Within the circuit blocks is a shutdown circuit that selectively prevents the system clock signal from functioning as the local clock signal in those circuit blocks that receive the shutdown signal, but the shutdown circuit only operates after both the signal to shutdown is received from the power control manager and after the circuit block has, in fact, shutdown.

    Abstract translation: 片上系统(SOC)包括掉电电路。 SOC内部有几个电路块,每个电路块响应于本地时钟信号而工作。 系统时钟耦合到电路块,用于提供用作所选电路块的本地时钟信号的系统时钟信号。 功率控制管理器提供至少部分地确定系统时钟是否将用作一些电路块的本地时钟的信号。 在电路块内是关闭电路,其选择性地防止系统时钟信号作为接收关闭信号的那些电路块中的本地时钟信号起作用,但是关闭电路仅在从功率控制器接收到关闭信号 经理和电路块实际上已经关闭。

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