公开(公告)号：US20040225869A1

公开(公告)日：2004-11-11

申请号：US10776024

申请日：2004-02-10

Applicant: STMicroelectronics S.r.I.

Inventor： Andrea Pagni ,  Fabrizio Lucini ,  Danilo Pietro Pau ,  Antonio Maria Borneo ,  Vittorio Zaccaria

IPC: G06F009/44

CPC classification number: G06F9/30174 ,  G06F9/30098 ,  G06F9/30189 ,  G06F9/3879

Abstract: A procedure for translating ARM instructions of a first set into instructions of a second set for execution on an LX processor comprising a core provides a first set of registers corresponding to the ARM instructions and a second set of registers corresponding to the instructions that can be executed on the LX processor. Each register of the first set is mapped in a corresponding register of the second set designed to emulate the behavior of the first register, obtaining a unique independent translation of the first set into the second set. The translation is performed by a translation device external to the LX core without altering the core, and the translation operating without accessing resources of the core, by the translating device intercepting accesses of the core to the storage area reserved to the ARM instructions.

Abstract translation: 用于将第一集合的ARM指令转换为用于在包括核的LX处理器上执行的第二集合的指令的过程提供对应于ARM指令的第一组寄存器和对应于可执行的指令的第二组寄存器 在LX处理器上。 将第一组的每个寄存器映射到第二组的对应寄存器中，该寄存器被设计为模拟第一寄存器的行为，从而获得第一集合到第二集合中的唯一的独立转换。 翻译由LX核心外部的翻译设备执行，而不改变核心，并且通过翻译设备将核心的访问拦截到保留给ARM指令的存储区域，而不会访问核心的资源。