Abstract:
An asynchronous data transmission device includes a data reception terminal receiving data clocked by a sampling signal in synchronization with a local clock signal. A register is connected to the data reception terminal for receiving the data. A clock deviation measuring circuit is connected to the register for determining a number M of periods of the sampling signal appearing during K periods of a synchronization signal received on the data reception terminal, and for comparing the number M to a tolerance margin defined by a lower threshold and an upper threshold.
Abstract:
A asynchronous frame receiver includes an input for receiving asynchronous frames. The asynchronous frames include standard characters, and a header that has a data bit length greater than a data bit length of the standard characters. A break character detection unit detects the break character. A standard character processing unit for detecting the standard characters is activated by the break character detection unit based upon the break character being detected.
Abstract:
An asynchronous frame receiver includes an input for receiving an asynchronous frame comprising a break character, which includes a determined number of bits having a same value. A hot-plugging circuit for connecting to an asynchronous data bus that is operating by detecting the break character, and leaving an initial idle state and switching to at least one operating mode when the break character has been detected.