公开(公告)号：US20030233605A1

公开(公告)日：2003-12-18

申请号：US10424166

申请日：2003-04-25

Applicant: STMicroelectronics SA

Inventor： Charaf Hanna

IPC: G11C029/00

CPC classification number: H03M13/2785 ,  H03M13/2707 ,  H03M13/2764

Abstract: A method for interlacing digital data to reduce transmission errors includes dividing a stream of digital data into consecutive blocks of bits, and interlacing each block of bits by writing to an interlacing table. The interlacing table is arranged in the form of rows and columns of memory addresses, with a number of the rows and columns corresponding to predetermined interlacing parameters. The access sequences to the memory addresses for interlacing the blocks of bits are different from each other. The method further includes reading a block of bits in the interlacing table according to a memory addresses access sequence, and also writing bits to a consecutive block of bits according to the memory addresses access sequence during the reading.

Abstract translation: 用于交织数字数据以减少传输错误的方法包括将数字数据流划分成连续的比特块，并且通过写入交织表来交织每个比特块。 交错表以行和列的存储器地址的形式排列，其中多个行和列对应于预定的交织参数。 到用于交错位块的存储器地址的访问序列彼此不同。 该方法还包括根据存储器地址访问序列读取交织表中的位块，并且还在读取期间根据存储器地址访问顺序将位写入连续的位块。