公开(公告)号：US20190094462A1

公开(公告)日：2019-03-28

申请号：US16185654

申请日：2018-11-09

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Jean-Robert Manouvrier ,  Jean-Francois Carpentier ,  Patrick LeMaitre

IPC: G02B6/124 ,  G02F1/025 ,  G02B6/30

Abstract: An electro-optic device may include a photonic chip having an optical grating coupler at a surface. The optical grating coupler may include a first semiconductor layer having a first base and first fingers extending outwardly from the first base. The optical grating coupler may include a second semiconductor layer having a second base and second fingers extending outwardly from the second base and being interdigitated with the first fingers to define semiconductor junction areas, with the first and second fingers having a non-uniform width. The electro-optic device may include a circuit coupled to the optical grating coupler and configured to bias the semiconductor junction areas and change one or more optical characteristics of the optical grating coupler.

公开(公告)号：US11269140B2

公开(公告)日：2022-03-08

申请号：US16185654

申请日：2018-11-09

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Jean-Robert Manouvrier ,  Jean-Francois Carpentier ,  Patrick LeMaitre

IPC: G02B6/124 ,  G02B6/30 ,  G02F1/025 ,  G02B6/293

Abstract: An electro-optic device may include a photonic chip having an optical grating coupler at a surface. The optical grating coupler may include a first semiconductor layer having a first base and first fingers extending outwardly from the first base. The optical grating coupler may include a second semiconductor layer having a second base and second fingers extending outwardly from the second base and being interdigitated with the first fingers to define semiconductor junction areas, with the first and second fingers having a non-uniform width. The electro-optic device may include a circuit coupled to the optical grating coupler and configured to bias the semiconductor junction areas and change one or more optical characteristics of the optical grating coupler.

公开(公告)号：US20170003571A1

公开(公告)日：2017-01-05

申请号：US15068704

申请日：2016-03-14

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Jean-Francois Carpentier ,  Patrick LeMaitre ,  Denis Pache

IPC: G02F1/225 ,  G02F1/025 ,  G02F1/01

CPC classification number: G02F1/2255 ,  G02F1/0123 ,  G02F1/025 ,  G02F1/2257 ,  G02F2001/212

Abstract: An integrated modulator of the Mach-Zehnder type includes two optical arms containing waveguides with PN junctions and biasing circuits for reverse biasing the PN junctions in response to a control signal. The two optical arms are situated within a semiconductor substrate of a first element that also has an interconnection region. The biasing circuits are situated, in part, within a substrate of a second element that also contains an interconnection region. The first and second elements are rigidly attached to each other via their respective interconnection regions.

Abstract translation: Mach-Zehnder型集成调制器包括两个含有PN结的波导的光学臂和用于响应控制信号反向偏置PN结的偏置电路。 两个光学臂位于也具有互连区域的第一元件的半导体衬底内。 偏置电路部分地位于也包含互连区域的第二元件的衬底内。 第一和第二元件通过其相应的互连区域彼此刚性连接。

公开(公告)号：US09453723B1

公开(公告)日：2016-09-27

申请号：US14754747

申请日：2015-06-30

Applicant: STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Patrick LeMaitre ,  Jean-Francois Carpentier

IPC: G01B11/26 ,  G01B11/27

CPC classification number: G01B11/27 ,  G01R31/31728 ,  G02B6/12019

Abstract: A method is for testing a photonic integrated circuit (IC) that includes a test structure having a test optical splitter, a test optical input, and first and second test optical outputs. A device under test (DUT) is coupled between the first test optical output and the first output of the test optical splitter. The deembedding structure includes a deembedding optical splitter, a deembedding optical input and first and second deembedding optical outputs. The method includes coupling a test probe device to the test optical inputs and outputs and the deembedding optical inputs and outputs and operating the test probe device to make at least one test measurement related to the DUT and at least one deembedding measurement. The at least one test measurement is processed with the at least one deembedding measurement to determine whether the DUT is acceptable and independent of alignment error.

Abstract translation: 一种用于测试包括具有测试光分路器，测试光输入以及第一和第二测试光输出的测试结构的光子集成电路（IC）的方法。 被测设备（DUT）耦合在第一测试光输出端和测试光分路器的第一输出端之间。 该装饰结构包括一个嵌入式光分路器，一个嵌入式光输入端和第一和第二嵌入式光输出端。 该方法包括将测试探针装置耦合到测试光输入和输出以及去嵌入光输入和输出，并操作测试探针装置以进行至少一个与DUT相关的测试测量和至少一个去镶嵌测量。 用至少一个去镶嵌测量来处理至少一个测试测量，以确定DUT是否可接受并且不依赖于对准误差。