公开(公告)号：US20160357299A1

公开(公告)日：2016-12-08

申请号：US14731385

申请日：2015-06-04

Applicant: SYNAPTICS INCORPORATED

Inventor： Chunbo LIU ,  Rafael BETANCOURT ,  Tae-Song CHUNG ,  Steve Chikin LO

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0418 ,  G06F2203/04108

Abstract: Various embodiments provide a processing module that calibrates a current-mode baseline correction system to account for features in an input device that lead to “offset” in output of a charge integrator used for sensing presence of an input object. The offset is a difference between a common mode voltage, which is the average voltage output of the charge integrator over a sensing cycle and a mid-rail voltage midway between high and low power supply voltages. Calibration is performed by adjusting an N-side and/or P-side current flow duration parameter until common mode voltage falls within a low offset window in which the offset is deemed to be sufficiently close to the mid-rail voltage. The resulting duration parameters are stored and used for current-mode baseline corrections when operating an associated sensor electrode for capacitive sensing.

Abstract translation: 各种实施例提供了一种处理模块，其校准电流模式基线校正系统以考虑输入装置中导致用于感测输入对象存在的电荷积分器的输出中的“偏移”的特征。 偏移量是共模电压，即在感测周期上的电荷积分器的平均电压输出和高电源电压和低电源电压之间的中间轨电压之间的差。 通过调整N侧和/或P侧电流持续时间参数来执行校准，直到共模电压落在低偏移窗口内，其中偏移被认为足够接近中间轨电压。 当操作用于电容感测的相关联的传感器电极时，所得到的持续时间参数被存储并用于电流模式基线校正。

公开(公告)号：US20170090669A1

公开(公告)日：2017-03-30

申请号：US14869595

申请日：2015-09-29

Applicant: Synaptics Incorporated

Inventor： Ranga Seshu PALADUGU ,  Chunbo LIU ,  Zheming LI

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/044 ,  G06F2203/04101

Abstract: A processing system for a capacitive sensing input device comprises a charge integrator, a circuit element having a first resistance, and a first switch coupled with the circuit element. The first circuit element is disposed in series with an input of the charge integrator. The first switch is configured to alter the first resistance to a second resistance when selectively closed during at least a portion of an integration phase of the charge integrator. The second resistance is lower than the first resistance.

公开(公告)号：US20220214765A1

公开(公告)日：2022-07-07

申请号：US17141483

申请日：2021-01-05

Applicant: Synaptics Incorporated

Inventor： Chunbo LIU ,  Selim GUNCER ,  Osman Emir EROL ,  Jonathan KU

IPC: G06F3/044 ,  H03F3/45 ,  G01D5/241

Abstract: A method and apparatus of global coarse baseline correction (GCBC) for capacitive scanning. An input device may include a number (N) of sensor electrodes, a GCBC circuit, and detection circuitry. Each sensor electrode is associated with a respective channel. The GCBC circuit produces sensing signals in each of the N channels and the detection circuitry may detect changes in the capacitances of one or more sensor electrodes based on the sensing signals. In some implementations, the GCBC circuit may include a current source which outputs a first current, a transimpedance amplifier (TIA) which converts the first current to a sensing voltage, and a number (N) of resistors that can be coupled between the output of the TIA and the N sensor electrodes, respectively. The coupling of each resistor between the TIA and a respective sensor electrode produces a sensing signal in the channel associated with the sensor electrode.

公开(公告)号：US20190121483A1

公开(公告)日：2019-04-25

申请号：US15865785

申请日：2018-01-09

Applicant: SYNAPTICS INCORPORATED

Inventor： Chunbo LIU ,  Koji KISHI ,  Zheming LI ,  Wenwei YANG

IPC: G06F3/041 ,  H02M3/07 ,  G06F3/044

Abstract: Embodiments herein provide a voltage regulation system comprising a charge pump a voltage regulator and a current regulator. The charge pump is configured to output a current signal to a capacitor. The voltage regulator is configured to sample an output of the capacitor, and compare the sampled voltage to a target voltage to generate a control signal. The current regulator is configured to sample a portion of the output current based on the control signal and regulate the current signal outputted by the charge pump.

公开(公告)号：US20180329573A1

公开(公告)日：2018-11-15

申请号：US15594208

申请日：2017-05-12

Applicant: SYNAPTICS INCORPORATED

Inventor： Chunbo LIU ,  Steve Chikin LO

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/0412 ,  G06F3/044

Abstract: Embodiments herein provide input devices that include a display panel on which a discrete capacitive sensor is disposed to form a capacitive sensing region. The capacitive sensor includes a plurality of sensor electrodes that are used to generate capacitive sensing signals indicating user interaction with the input device. Moreover, the input device includes analog interference detection circuitry for mitigating the negative impact of display noise on capacitive sensing. In one embodiment, the input device includes a reference circuit which is capacitively coupled to a display noise source and outputs a reference voltage that biases a charge integrator in a receiver channel used for capacitive sensing. In another embodiment, the input device includes a current conveyor coupled to an idle transmitter electrode of the sensor electrodes which outputs a correction current to a receiver channel to cancel a display noise current injected into the receiver channel.