公开(公告)号：US20160190987A1

公开(公告)日：2016-06-30

申请号：US14584942

申请日：2014-12-29

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Steve Chikin LO

IPC: H03D7/14 ,  G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0412 ,  G06F3/0416 ,  G06F3/044 ,  H03D7/1466 ,  H03D2200/0078 ,  H03D2200/0086

Abstract: Disclosed herein are techniques related to a discrete-time harmonic rejection mixer. The discrete-time harmonic rejection mixer includes a switched-capacitor network and a switch controller. The switched-capacitor network includes first, second, and third switched capacitor sub-circuits, each including a pair of capacitors and a set of switches. The switch controller is coupled to the switched-capacitor network, and is configured to operate the sets of switches. More specifically, the switch controller is configured to operate the sets of switches in an out of phase manner to produce the harmonic rejection effect. Capacitance values for the first pair of capacitors are roughly equal to capacitance values for the third pair of capacitors. An input device, method, and harmonic rejection circuit exhibiting the above features are provided as examples.

Abstract translation: 这里公开的是与离散时间谐波抑制混频器有关的技术。 离散时间谐波抑制混频器包括开关电容网络和开关控制器。 开关电容器网络包括第一，第二和第三开关电容器子电路，每个包括一对电容器和一组开关。 开关控制器耦合到开关电容器网络，并且被配置为操作该组开关。 更具体地，开关控制器被配置为以异相方式操作开关组，以产生谐波抑制效应。 第一对电容器的电容值大致等于第三对电容器的电容值。 作为示例提供了具有上述特征的输入装置，方法和谐波抑制电路。

公开(公告)号：US20190095002A1

公开(公告)日：2019-03-28

申请号：US16036018

申请日：2018-07-16

Applicant: Synaptics Incorporated

Inventor： Eric Scott BOHANNON ,  Steve Chikin LO ,  Petr SHEPELEV

IPC: G06F3/044 ,  H03K17/96 ,  G06F3/041

Abstract: An input device includes a plurality of sensor electrodes and a processing system that is operable in at least a first mode or a second mode. The processing system is configured to receive an input current from a pair of the sensor electrodes. When operating the first mode, the processing system is configured to measure a capacitance across the pair of sensor electrodes based on the received input current. When operating the second mode, the processing system is configured to measure a resistance between the pair of sensor electrodes based on the received input current.

公开(公告)号：US20160357299A1

公开(公告)日：2016-12-08

申请号：US14731385

申请日：2015-06-04

Applicant: SYNAPTICS INCORPORATED

Inventor： Chunbo LIU ,  Rafael BETANCOURT ,  Tae-Song CHUNG ,  Steve Chikin LO

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0418 ,  G06F2203/04108

Abstract: Various embodiments provide a processing module that calibrates a current-mode baseline correction system to account for features in an input device that lead to “offset” in output of a charge integrator used for sensing presence of an input object. The offset is a difference between a common mode voltage, which is the average voltage output of the charge integrator over a sensing cycle and a mid-rail voltage midway between high and low power supply voltages. Calibration is performed by adjusting an N-side and/or P-side current flow duration parameter until common mode voltage falls within a low offset window in which the offset is deemed to be sufficiently close to the mid-rail voltage. The resulting duration parameters are stored and used for current-mode baseline corrections when operating an associated sensor electrode for capacitive sensing.

Abstract translation: 各种实施例提供了一种处理模块，其校准电流模式基线校正系统以考虑输入装置中导致用于感测输入对象存在的电荷积分器的输出中的“偏移”的特征。 偏移量是共模电压，即在感测周期上的电荷积分器的平均电压输出和高电源电压和低电源电压之间的中间轨电压之间的差。 通过调整N侧和/或P侧电流持续时间参数来执行校准，直到共模电压落在低偏移窗口内，其中偏移被认为足够接近中间轨电压。 当操作用于电容感测的相关联的传感器电极时，所得到的持续时间参数被存储并用于电流模式基线校正。

公开(公告)号：US20190034027A1

公开(公告)日：2019-01-31

申请号：US15660393

申请日：2017-07-26

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Steve Chikin LO ,  Keung Kwok KWAN

IPC: G06F3/041 ,  G06F3/044

Abstract: Methods and associated processing systems are disclosed for acquiring gain mismatch values and offset mismatch values corresponding to a plurality of analog-to-digital converters (ADCs). One method comprises coupling receiver circuitry of a processing system with a capacitive sensor comprising a plurality of sensor electrodes, the receiver circuitry comprising a plurality of ADCs, each ADC of the plurality of ADCs coupled with one or more respective sensor electrodes of the plurality of sensor electrodes. The method further comprises, while at least a portion of transmitter circuitry of the processing system is disabled, acquiring measurements using each ADC of the plurality of ADCs; and storing, using the acquired measurements, a plurality of offset mismatch values in a memory of the processing system. The processing system is operable to apply the plurality of offset mismatch values to capacitive measurements acquired using the plurality of ADCs.

公开(公告)号：US20180356936A1

公开(公告)日：2018-12-13

申请号：US15620429

申请日：2017-06-12

Applicant: SYNAPTICS INCORPORATED

Inventor： Petr SHEPELEV ,  Steve Chikin LO

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/044

Abstract: Embodiments herein describe input devices that include receivers for sampling capacitive sensing signals that perform continuous-time demodulation. An input device is provided that includes a plurality of sensor electrodes in a sensing region of the input device and a processing system coupled to the plurality of sensor electrodes and configured to generate a first measurement of a capacitive sensing signal acquired using a first sensor electrode of the plurality of sensor electrodes during a first time period, that comprises effects of a first modulated signal driven onto at least one of the plurality of sensor electrodes, the first measurement generated at a first sensing frequency based on a clock signal; periodically dither the clock signal; and adjust a demodulation frequency based on the dithered clock signal to generate a second measurement of the capacitive sensing signal during a second time period at the first sensing frequency based on the dithered clock signal.

公开(公告)号：US20180329573A1

公开(公告)日：2018-11-15

申请号：US15594208

申请日：2017-05-12

Applicant: SYNAPTICS INCORPORATED

Inventor： Chunbo LIU ,  Steve Chikin LO

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0418 ,  G06F3/0412 ,  G06F3/044

Abstract: Embodiments herein provide input devices that include a display panel on which a discrete capacitive sensor is disposed to form a capacitive sensing region. The capacitive sensor includes a plurality of sensor electrodes that are used to generate capacitive sensing signals indicating user interaction with the input device. Moreover, the input device includes analog interference detection circuitry for mitigating the negative impact of display noise on capacitive sensing. In one embodiment, the input device includes a reference circuit which is capacitively coupled to a display noise source and outputs a reference voltage that biases a charge integrator in a receiver channel used for capacitive sensing. In another embodiment, the input device includes a current conveyor coupled to an idle transmitter electrode of the sensor electrodes which outputs a correction current to a receiver channel to cancel a display noise current injected into the receiver channel.

公开(公告)号：US20170005572A1

公开(公告)日：2017-01-05

申请号：US14788712

申请日：2015-06-30

Applicant: SYNAPTICS INCORPORATED

Inventor： Zheming LI ,  Steve Chikin LO

IPC: H02M3/07 ,  G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0416 ,  G06F3/044 ,  H02M1/44 ,  H02M3/07 ,  H02M2001/0035 ,  Y02B70/16

Abstract: In an example, a processing system for an electronic device, such as a capacitive sensing device, includes a reservoir capacitor configured to store charge from a charge pump, and a control circuit configured to operate the charge pump at irregular intervals to transfer charge to the reservoir capacitor.

Abstract translation: 在一个示例中，用于诸如电容感测装置的电子设备的处理系统包括被配置为存储来自电荷泵的电荷的储存器电容器，以及被配置为以不规则间隔操作电荷泵以将电荷转移到 储层电容器。