公开(公告)号：US20160357299A1

公开(公告)日：2016-12-08

申请号：US14731385

申请日：2015-06-04

Applicant: SYNAPTICS INCORPORATED

Inventor： Chunbo LIU ,  Rafael BETANCOURT ,  Tae-Song CHUNG ,  Steve Chikin LO

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/044 ,  G06F3/0418 ,  G06F2203/04108

Abstract: Various embodiments provide a processing module that calibrates a current-mode baseline correction system to account for features in an input device that lead to “offset” in output of a charge integrator used for sensing presence of an input object. The offset is a difference between a common mode voltage, which is the average voltage output of the charge integrator over a sensing cycle and a mid-rail voltage midway between high and low power supply voltages. Calibration is performed by adjusting an N-side and/or P-side current flow duration parameter until common mode voltage falls within a low offset window in which the offset is deemed to be sufficiently close to the mid-rail voltage. The resulting duration parameters are stored and used for current-mode baseline corrections when operating an associated sensor electrode for capacitive sensing.

Abstract translation: 各种实施例提供了一种处理模块，其校准电流模式基线校正系统以考虑输入装置中导致用于感测输入对象存在的电荷积分器的输出中的“偏移”的特征。 偏移量是共模电压，即在感测周期上的电荷积分器的平均电压输出和高电源电压和低电源电压之间的中间轨电压之间的差。 通过调整N侧和/或P侧电流持续时间参数来执行校准，直到共模电压落在低偏移窗口内，其中偏移被认为足够接近中间轨电压。 当操作用于电容感测的相关联的传感器电极时，所得到的持续时间参数被存储并用于电流模式基线校正。

公开(公告)号：US20160334902A1

公开(公告)日：2016-11-17

申请号：US14870243

申请日：2015-09-30

Applicant: SYNAPTICS INCORPORATED

Inventor： Zheming LI ,  Saikrishna GANTA ,  Tae-Song CHUNG ,  Rafael BETANCOURT ,  John Michael WEINERTH ,  Farzaneh SHAHROKHI

IPC: G06F3/044 ,  G06F3/041 ,  G06F3/01

CPC classification number: G06F3/044 ,  G06F3/016 ,  G06F3/0416 ,  G06F2203/04108

Abstract: A capacitance measurement circuit cancels background capacitance while reducing charge leakage and supply ripples during reset phases and integrate phases. The capacitance measurement circuit operates a first switch into a linear mode causing a first resistance in the first switch, and after a delay, operates a second switch into a saturation mode causing a second resistance in parallel to the first resistance.

Abstract translation: 电容测量电路消除背景电容，同时减少电荷泄漏并在复位阶段提供纹波并整合相位。 电容测量电路将第一开关操作成线性模式，导致第一开关中的第一电阻，并且在延迟之后，将第二开关操作为饱和模式，使得与第一电阻平行的第二电阻。