公开(公告)号：US20180356914A1

公开(公告)日：2018-12-13

申请号：US16107570

申请日：2018-08-21

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Marshall J. BELL, JR. ,  Yihong YANG

IPC: G06F3/041 ,  G06F3/044 ,  G06F3/0354

Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.

公开(公告)号：US20180004317A1

公开(公告)日：2018-01-04

申请号：US15199276

申请日：2016-06-30

Applicant: SYNAPTICS INCORPORATED

Inventor： Eric Scott BOHANNON ,  Marshall J. BELL, JR. ,  Yihong YANG

IPC: G06F3/041

CPC classification number: G06F3/041 ,  G06F3/03547 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/0418 ,  G06F3/044

Abstract: A processing system, and associated input device and method are disclosed suitable for reducing a receiver size within the input device. The processing system comprises a delta-sigma modulator comprising one or more input nodes configured to receive a signal based on a sensor signal received from at least a first sensor electrode of the plurality of sensor electrodes. The delta-sigma modulator further comprises an integrator coupled with the one or more input nodes and configured to produce an integration signal, a quantizer coupled with an output of the integrator and configured to quantize the integration signal, and a feedback digital-to-analog converter (DAC) controlled based by the quantizer. The processing system further comprises a digital filter coupled with an output of the delta-sigma modulator and configured to mitigate a quantization noise of the quantizer.