公开(公告)号：US10573223B2

公开(公告)日：2020-02-25

申请号：US15406948

申请日：2017-01-16

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji-Hye Kong ,  Ji-Su Na ,  Yong-Sung Park ,  Dong-Bum Lee ,  In-Ho Choi ,  Young-In Hwang ,  Min-Woo Byun ,  Hea-Min Jung

IPC: G09G3/20 ,  G09G3/3266 ,  H01L27/12

Abstract: A scan driver includes scan signal outputting circuits, at least one of the scan signal outputting circuits includes a driving circuit and a buffer circuit. The driving circuit includes driving transistors. The driving circuit provides first and second driving signals to first and second driving nodes, respectively by turning on or off the driving transistors in response to clock signals and a scan input signal. The buffer circuit includes buffer transistors. The buffer circuit outputs a scan signal at an output node by turning on or off the buffer transistors in response to the first and second driving signals. The at least one of the scan signal outputting circuits performs a back-biasing voltage applying operation on at least one of the driving transistors and the buffer transistors when the driving transistors and the buffer transistors are turned on or off.

公开(公告)号：US10510301B2

公开(公告)日：2019-12-17

申请号：US15452862

申请日：2017-03-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji-Su Na ,  Ji-Hye Kong ,  Young-In Hwang

IPC: G09G3/36 ,  G09G3/3266 ,  G09G3/3258

Abstract: A scan driver is integrated to include multiple drivers in a peripheral area of a display. The drivers output gate, emission, and/or other signals for driving pixel circuits in the display based on one or more clock signals.

公开(公告)号：US10062321B2

公开(公告)日：2018-08-28

申请号：US15173324

申请日：2016-06-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji-Su Na ,  Kyoung-Jin Park

IPC: G06F3/038 ,  G09G3/3208 ,  G09G3/20 ,  G09G3/3233

CPC classification number: G09G3/3208 ,  G09G3/2092 ,  G09G3/3233 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/045 ,  G09G2330/028

Abstract: A pixel circuit includes a first-transistor including gate-electrode receiving first emission control signal, first-electrode connected to ELVDD, and second-electrode connected to first node, a second-transistor including gate-electrode receiving second emission control signal, first-electrode, and second-electrode connected to second node, a third-transistor including gate-electrode connected to third node, first-electrode connected to first node, and second-electrode connected to first-electrode of the second-transistor, an OLED including anode connected to second node and cathode connected to ELVSS, a fourth-transistor including gate-electrode receiving bias scan signal, first-electrode connected to initialization voltage, and second-electrode connected to second node, a fifth-transistor including gate-electrode receiving bias scan signal, first-electrode connected to reference voltage, and second-electrode connected to third node, a sixth-transistor including gate-electrode receiving data scan signal, first-electrode receiving data signal, and second-electrode connected to third node, a storage-capacitor between first node and third node, and a hold-capacitor between ELVDD and first node.

公开(公告)号：US10043432B2

公开(公告)日：2018-08-07

申请号：US15047502

申请日：2016-02-18

Applicant: Samsung Display Co., LTD.

Inventor： Seung-Kyu Lee ,  Ji-Su Na

IPC: G09G3/3266 ,  G09G3/3258 ,  G09G3/20 ,  G09G3/3233 ,  G11C19/18

Abstract: An emission driver includes light emission driving controllers that are electrically connected to light emission control lines. Each of the light emission driving controllers may include a first circuit block configured to provide a second voltage to a first node in response to a first clock signal and to output a first voltage as a light emission control signal based on a voltage at the first node and a second clock signal having a phase difference from a phase of the first clock signal; and a second circuit block configured to provide a synchronization signal to a second node in response to the first clock signal, to maintain a voltage at the second node using a metal-oxide-semiconductor (MOS) capacitor, and to pull down the light emission control signal to have the second voltage in response to the voltage at the second node.

公开(公告)号：US10127861B2

公开(公告)日：2018-11-13

申请号：US15392966

申请日：2016-12-28

Applicant: Samsung Display Co., Ltd.

Inventor： Ji-Su Na ,  Jin-Tae Jeong

IPC: G09G5/00 ,  G09G3/3266 ,  G09G3/3233 ,  G09G3/3275

Abstract: A scan driver includes a plurality of scan driving blocks. Each of the scan driving blocks includes a first shift register including a plurality of driving transistors, the first shift register being configured to provide a first driving signal to a first driving node and to provide a second driving signal to a second driving node, a second shift register including a plurality of masking transistors, the second shift register being configured to provide a masking signal to a masking output node, and a buffer circuit including a plurality of buffer transistors, the buffer circuit being configured to provide scan signals. The buffer circuit outputs the scan signals that include the first pulse or the scan signals that include the first pulse and the second pulse based on the masking signal.

公开(公告)号：US20170124941A1

公开(公告)日：2017-05-04

申请号：US15173324

申请日：2016-06-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Ji-Su Na ,  Kyoung-Jin Park

IPC: G09G3/3208 ,  G09G3/20

CPC classification number: G09G3/3208 ,  G09G3/2092 ,  G09G3/3233 ,  G09G2300/043 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2320/045 ,  G09G2330/028

Abstract: A pixel circuit includes a first-transistor including gate-electrode receiving first emission control signal, first-electrode connected to ELVDD, and second-electrode connected to first node, a second-transistor including gate-electrode receiving second emission control signal, first-electrode, and second-electrode connected to second node, a third-transistor including gate-electrode connected to third node, first-electrode connected to first node, and second-electrode connected to first-electrode of the second-transistor, an OLED including anode connected to second node and cathode connected to ELVSS, a fourth-transistor including gate-electrode receiving bias scan signal, first-electrode connected to initialization voltage, and second-electrode connected to second node, a fifth-transistor including gate-electrode receiving bias scan signal, first-electrode connected to reference voltage, and second-electrode connected to third node, a sixth-transistor including gate-electrode receiving data scan signal, first-electrode receiving data signal, and second-electrode connected to third node, a storage-capacitor between first node and third node, and a hold-capacitor between ELVDD and first node.