Abstract:
A display device includes a first conductive layer including horizontal scan lines, and island-type electrodes, which are spaced apart from the horizontal scan lines; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer, the second conductive layer including data lines, and a plurality of vertical scan lines; a second insulating layer disposed on the second conductive layer; and a third conductive layer disposed on the second insulating layer and including first shield electrodes, which cover first edges of the vertical scan lines, and second shield electrodes, which are spaced apart from the first shield electrodes, and cover second edges of the vertical scan lines, wherein the vertical scan lines are electrically connected to the island-type electrodes via contact holes that extend through the first insulating layer.
Abstract:
The display device includes data lines, first gate lines arranged in parallel with the data lines, second gate lines intersecting the first gate lines, a line contact portion in which each of the plurality of first gate lines and each of the plurality of second gate lines are in contact with each other, a non-contact portion in which each of the plurality of first gate lines and each of the plurality of second gate lines are insulated from each other in an intersection area thereof, a first pixel including a first switching element connected to a corresponding second gate line among the second gate lines, and a second pixel including a second switching element connected to the second gate line connected to the first pixel, wherein magnitude of a first capacitance of the first switching element is different from magnitude of a first capacitance of the second switching element.
Abstract:
A thin film transistor array panel includes a first substrate; a gate line and a data line on the first substrate; a storage electrode line on the first substrate where a constant voltage is applied thereto; a first thin film transistor and a second thin film transistor which are connected to the gate line and the data line; a third thin film transistor which is connected to the gate line, the second thin film transistor and the storage electrode line; a first subpixel electrode which is connected to the first thin film transistor; and a second subpixel electrode which is connected to the second thin film transistor.
Abstract:
A display device includes a first conductive layer including horizontal scan lines, and island-type electrodes, which are spaced apart from the horizontal scan lines; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer, the second conductive layer including data lines, and a plurality of vertical scan lines; a second insulating layer disposed on the second conductive layer; and a third conductive layer disposed on the second insulating layer and including first shield electrodes, which cover first edges of the vertical scan lines, and second shield electrodes, which are spaced apart from the first shield electrodes, and cover second edges of the vertical scan lines, wherein the vertical scan lines are electrically connected to the island-type electrodes via contact holes that extend through the first insulating layer.
Abstract:
A liquid crystal display, the liquid crystal display comprises a plurality of gate lines which includes a first gate line, a transformation gate line, and a second gate line; a data line; and a pixel, wherein the pixel includes a first liquid crystal capacitor which includes a first sub-pixel electrode and a common electrode and a second liquid crystal capacitor which includes a second sub-pixel electrode and a common electrode; a first switching element connected to the first gate line, the data line, and the first sub-pixel electrode; a second switching element connected to the first gate line, the data line, and the second sub-pixel electrode; a third switching element connected to the transformation gate line and the second switching element; a transformation capacitor which includes a first terminal connected to the second gate line and a second terminal connected to the third switching element; and a first period where a gate-on voltage Von is applied to the first gate line and a second period where the gate-on voltage Von is applied to the transformation gate line do not overlap each other and, a gate-off voltage Voff is applied to the second gate line during the second period.